[llvm] [llvm][InstCombine] Fold signum(x) into scmp(x, 0) (PR #143445)

Yash Solanki via llvm-commits llvm-commits at lists.llvm.org
Fri Jun 13 01:23:39 PDT 2025


https://github.com/yashnator updated https://github.com/llvm/llvm-project/pull/143445

>From e620e76315602e72262010169f7bf51d4b881314 Mon Sep 17 00:00:00 2001
From: Yash Solanki <252yash at gmail.com>
Date: Tue, 10 Jun 2025 02:53:42 +0530
Subject: [PATCH 1/2] [Instcombine][Tests] Add test for folding select to cmp
 with constants in non-canonical inequalities

---
 .../Transforms/InstCombine/select-to-cmp.ll   | 254 ++++++++++++++++++
 1 file changed, 254 insertions(+)
 create mode 100644 llvm/test/Transforms/InstCombine/select-to-cmp.ll

diff --git a/llvm/test/Transforms/InstCombine/select-to-cmp.ll b/llvm/test/Transforms/InstCombine/select-to-cmp.ll
new file mode 100644
index 0000000000000..72b9a4301a77d
--- /dev/null
+++ b/llvm/test/Transforms/InstCombine/select-to-cmp.ll
@@ -0,0 +1,254 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
+; RUN: opt -passes=instcombine -S < %s | FileCheck %s
+
+; Tests for select to scmp
+
+define i32 @scmp_x_0_inverted(i32 %x) {
+; CHECK-LABEL: define i32 @scmp_x_0_inverted(
+; CHECK-SAME: i32 [[X:%.*]]) {
+; CHECK-NEXT:    [[TMP4:%.*]] = icmp ne i32 [[X]], 0
+; CHECK-NEXT:    [[TMP2:%.*]] = zext i1 [[TMP4]] to i32
+; CHECK-NEXT:    [[TMP3:%.*]] = icmp sgt i32 [[X]], -1
+; CHECK-NEXT:    [[TMP1:%.*]] = select i1 [[TMP3]], i32 [[TMP2]], i32 -1
+; CHECK-NEXT:    ret i32 [[TMP1]]
+;
+  %2 = icmp ne i32 %x, 0
+  %3 = zext i1 %2 to i32
+  %4 = icmp sgt i32 %x, -1
+  %5 = select i1 %4, i32 %3, i32 -1
+  ret i32 %5
+}
+
+; y = -10
+define i32 @scmp_x_0_inverted_const_neg10(i32 %x) {
+; CHECK-LABEL: define i32 @scmp_x_0_inverted_const_neg10(
+; CHECK-SAME: i32 [[X:%.*]]) {
+; CHECK-NEXT:    [[TMP4:%.*]] = icmp ne i32 [[X]], -10
+; CHECK-NEXT:    [[TMP2:%.*]] = zext i1 [[TMP4]] to i32
+; CHECK-NEXT:    [[TMP3:%.*]] = icmp sgt i32 [[X]], -11
+; CHECK-NEXT:    [[TMP1:%.*]] = select i1 [[TMP3]], i32 [[TMP2]], i32 -1
+; CHECK-NEXT:    ret i32 [[TMP1]]
+;
+  %1 = icmp ne i32 %x, -10
+  %2 = zext i1 %1 to i32
+  %3 = icmp sgt i32 %x, -11
+  %4 = select i1 %3, i32 %2, i32 -1
+  ret i32 %4
+}
+
+; y = 7 (i8)
+define i8 @scmp_x_0_inverted_i8(i8 %x) {
+; CHECK-LABEL: define i8 @scmp_x_0_inverted_i8(
+; CHECK-SAME: i8 [[X:%.*]]) {
+; CHECK-NEXT:    [[TMP4:%.*]] = icmp ne i8 [[X]], 7
+; CHECK-NEXT:    [[TMP2:%.*]] = zext i1 [[TMP4]] to i8
+; CHECK-NEXT:    [[TMP3:%.*]] = icmp sgt i8 [[X]], 6
+; CHECK-NEXT:    [[TMP1:%.*]] = select i1 [[TMP3]], i8 [[TMP2]], i8 -1
+; CHECK-NEXT:    ret i8 [[TMP1]]
+;
+  %1 = icmp ne i8 %x, 7
+  %2 = zext i1 %1 to i8
+  %3 = icmp sgt i8 %x, 6
+  %4 = select i1 %3, i8 %2, i8 -1
+  ret i8 %4
+}
+
+; scmp using ints of two kinds- i32 and i64
+define i32 @scmp_x_0_inverted_i64_neq(i32 %x) {
+; CHECK-LABEL: define i32 @scmp_x_0_inverted_i64_neq(
+; CHECK-SAME: i32 [[X:%.*]]) {
+; CHECK-NEXT:    [[CMP1:%.*]] = icmp ne i32 [[X]], 0
+; CHECK-NEXT:    [[CMP2:%.*]] = icmp sgt i32 [[X]], -1
+; CHECK-NEXT:    [[TMP1:%.*]] = zext i1 [[CMP1]] to i32
+; CHECK-NEXT:    [[RET:%.*]] = select i1 [[CMP2]], i32 [[TMP1]], i32 -1
+; CHECK-NEXT:    ret i32 [[RET]]
+;
+  %x64 = sext i32 %x to i64
+  %cmp1 = icmp ne i64 %x64, 0
+  %zext = zext i1 %cmp1 to i64
+  %cmp2 = icmp sgt i64 %x64, -1
+  %sel = select i1 %cmp2, i64 %zext, i64 -1
+  %ret = trunc i64 %sel to i32
+  ret i32 %ret
+}
+
+; Same example as previous but with inequality
+define i32 @scmp_x_0_inverted_i64_sgt(i32 %x) {
+; CHECK-LABEL: define i32 @scmp_x_0_inverted_i64_sgt(
+; CHECK-SAME: i32 [[X:%.*]]) {
+; CHECK-NEXT:    [[CMP1:%.*]] = icmp sgt i32 [[X]], 0
+; CHECK-NEXT:    [[CMP2:%.*]] = icmp sgt i32 [[X]], -1
+; CHECK-NEXT:    [[TMP1:%.*]] = zext i1 [[CMP1]] to i32
+; CHECK-NEXT:    [[RET:%.*]] = select i1 [[CMP2]], i32 [[TMP1]], i32 -1
+; CHECK-NEXT:    ret i32 [[RET]]
+;
+  %x64 = sext i32 %x to i64
+  %cmp1 = icmp sgt i64 %x64, 0
+  %zext = zext i1 %cmp1 to i64
+  %cmp2 = icmp sgt i64 %x64, -1
+  %sel = select i1 %cmp2, i64 %zext, i64 -1
+  %ret = trunc i64 %sel to i32
+  ret i32 %ret
+}
+
+; y = -1000
+define i32 @scmp_x_0_inverted_const_neg1000(i32 %x) {
+; CHECK-LABEL: define i32 @scmp_x_0_inverted_const_neg1000(
+; CHECK-SAME: i32 [[X:%.*]]) {
+; CHECK-NEXT:    [[TMP4:%.*]] = icmp sgt i32 [[X]], -1000
+; CHECK-NEXT:    [[TMP2:%.*]] = zext i1 [[TMP4]] to i32
+; CHECK-NEXT:    [[TMP3:%.*]] = icmp sgt i32 [[X]], -1001
+; CHECK-NEXT:    [[TMP1:%.*]] = select i1 [[TMP3]], i32 [[TMP2]], i32 -1
+; CHECK-NEXT:    ret i32 [[TMP1]]
+;
+  %1 = icmp sgt i32 %x, -1000
+  %2 = zext i1 %1 to i32
+  %3 = icmp sgt i32 %x, -1001
+  %4 = select i1 %3, i32 %2, i32 -1
+  ret i32 %4
+}
+
+; y = 1729
+define i32 @scmp_x_0_inverted_const_1729_sgt(i32 %x) {
+; CHECK-LABEL: define i32 @scmp_x_0_inverted_const_1729_sgt(
+; CHECK-SAME: i32 [[X:%.*]]) {
+; CHECK-NEXT:    [[TMP4:%.*]] = icmp sgt i32 [[X]], 1729
+; CHECK-NEXT:    [[TMP2:%.*]] = zext i1 [[TMP4]] to i32
+; CHECK-NEXT:    [[TMP3:%.*]] = icmp sgt i32 [[X]], 1728
+; CHECK-NEXT:    [[TMP1:%.*]] = select i1 [[TMP3]], i32 [[TMP2]], i32 -1
+; CHECK-NEXT:    ret i32 [[TMP1]]
+;
+  %1 = icmp sgt i32 %x, 1729
+  %2 = zext i1 %1 to i32
+  %3 = icmp sgt i32 %x, 1728
+  %4 = select i1 %3, i32 %2, i32 -1
+  ret i32 %4
+}
+
+; ucmp with 10
+define i32 @ucmp_x_10_inverted(i32 %x) {
+; CHECK-LABEL: define i32 @ucmp_x_10_inverted(
+; CHECK-SAME: i32 [[X:%.*]]) {
+; CHECK-NEXT:    [[TMP4:%.*]] = icmp ne i32 [[X]], 10
+; CHECK-NEXT:    [[TMP2:%.*]] = zext i1 [[TMP4]] to i32
+; CHECK-NEXT:    [[TMP3:%.*]] = icmp ugt i32 [[X]], 9
+; CHECK-NEXT:    [[TMP1:%.*]] = select i1 [[TMP3]], i32 [[TMP2]], i32 -1
+; CHECK-NEXT:    ret i32 [[TMP1]]
+;
+  %1 = icmp ne i32 %x, 10
+  %2 = zext i1 %1 to i32
+  %3 = icmp ugt i32 %x, 9
+  %4 = select i1 %3, i32 %2, i32 -1
+  ret i32 %4
+}
+
+; ucmp with -3, wraps around
+define i32 @ucmp_x_neg1_inverted(i32 %x) {
+; CHECK-LABEL: define i32 @ucmp_x_neg1_inverted(
+; CHECK-SAME: i32 [[X:%.*]]) {
+; CHECK-NEXT:    [[TMP4:%.*]] = icmp ne i32 [[X]], -3
+; CHECK-NEXT:    [[TMP2:%.*]] = zext i1 [[TMP4]] to i32
+; CHECK-NEXT:    [[TMP3:%.*]] = icmp ugt i32 [[X]], -4
+; CHECK-NEXT:    [[TMP1:%.*]] = select i1 [[TMP3]], i32 [[TMP2]], i32 -1
+; CHECK-NEXT:    ret i32 [[TMP1]]
+;
+  %1 = icmp ne i32 %x, -3
+  %2 = zext i1 %1 to i32
+  %3 = icmp ugt i32 %x, -4
+  %4 = select i1 %3, i32 %2, i32 -1
+  ret i32 %4
+}
+
+; ucmp with -4, wraps around
+define i8 @ucmp_x_neg4_i8_ugt(i8 %x) {
+; CHECK-LABEL: define i8 @ucmp_x_neg4_i8_ugt(
+; CHECK-SAME: i8 [[X:%.*]]) {
+; CHECK-NEXT:    [[TMP4:%.*]] = icmp ugt i8 [[X]], -4
+; CHECK-NEXT:    [[TMP2:%.*]] = zext i1 [[TMP4]] to i8
+; CHECK-NEXT:    [[TMP3:%.*]] = icmp ugt i8 [[X]], -5
+; CHECK-NEXT:    [[TMP1:%.*]] = select i1 [[TMP3]], i8 [[TMP2]], i8 -1
+; CHECK-NEXT:    ret i8 [[TMP1]]
+;
+  %1 = icmp ugt i8 %x, -4
+  %2 = zext i1 %1 to i8
+  %3 = icmp ugt i8 %x, -5
+  %4 = select i1 %3, i8 %2, i8 -1
+  ret i8 %4
+}
+
+; Negative examples
+
+; Not scmp due to wrong RHS of the predicate
+define i32 @scmp_ne_0(i32 %0) {
+; CHECK-LABEL: define i32 @scmp_ne_0(
+; CHECK-SAME: i32 [[TMP0:%.*]]) {
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp ne i32 [[TMP0]], 0
+; CHECK-NEXT:    [[TMP3:%.*]] = zext i1 [[TMP2]] to i32
+; CHECK-NEXT:    [[TMP4:%.*]] = icmp sgt i32 [[TMP0]], 1
+; CHECK-NEXT:    [[TMP5:%.*]] = select i1 [[TMP4]], i32 [[TMP3]], i32 -1
+; CHECK-NEXT:    ret i32 [[TMP5]]
+;
+  %2 = icmp ne i32 %0, 0
+  %3 = zext i1 %2 to i32
+  %4 = icmp sgt i32 %0, 1
+  %5 = select i1 %4, i32 %3, i32 -1
+  ret i32 %5
+}
+
+; y = 0 with unsigned compare but RHS wraps
+define i32 @ucmp_x_0_inverted(i32 %x) {
+; CHECK-LABEL: define i32 @ucmp_x_0_inverted(
+; CHECK-SAME: i32 [[X:%.*]]) {
+; CHECK-NEXT:    ret i32 -1
+;
+  %1 = icmp ne i32 %x, 0
+  %2 = zext i1 %1 to i32
+  %3 = icmp ugt i32 %x, -1
+  %4 = select i1 %3, i32 %2, i32 -1
+  ret i32 %4
+}
+
+; Don't fold with INT32_MIN
+define i32 @scmp_x_0_inverted_const_min(i32 %x) {
+; CHECK-LABEL: define i32 @scmp_x_0_inverted_const_min(
+; CHECK-SAME: i32 [[X:%.*]]) {
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[X]], -2147483648
+; CHECK-NEXT:    [[TMP2:%.*]] = zext i1 [[TMP1]] to i32
+; CHECK-NEXT:    ret i32 [[TMP2]]
+;
+  %1 = icmp ne i32 %x, -2147483648
+  %2 = zext i1 %1 to i32
+  %3 = icmp sge i32 %x, -2147483648
+  %4 = select i1 %3, i32 %2, i32 -1
+  ret i32 %4
+}
+
+; Comparison of i32 with UINT32_MAX should always be -1
+define i32 @ucmp_x_0_inverted_i64_ugt(i32 %x) {
+; CHECK-LABEL: define i32 @ucmp_x_0_inverted_i64_ugt(
+; CHECK-SAME: i32 [[X:%.*]]) {
+; CHECK-NEXT:    ret i32 -1
+;
+  %x64 = zext i32 %x to i64
+  %cmp1 = icmp ugt i64 %x64, 0
+  %zext = zext i1 %cmp1 to i64
+  %cmp2 = icmp ugt i64 %x64, -1
+  %sel = select i1 %cmp2, i64 %zext, i64 -1
+  %ret = trunc i64 %sel to i32
+  ret i32 %ret
+}
+
+; y = 4294967295 (UINT32_MAX), simply sign extend neq
+define i32 @ucmp_x_const_u32max(i32 %x) {
+; CHECK-LABEL: define i32 @ucmp_x_const_u32max(
+; CHECK-SAME: i32 [[X:%.*]]) {
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[X]], -1
+; CHECK-NEXT:    [[TMP2:%.*]] = sext i1 [[TMP1]] to i32
+; CHECK-NEXT:    ret i32 [[TMP2]]
+;
+  %1 = icmp ugt i32 %x, 4294967295
+  %2 = zext i1 %1 to i32
+  %3 = icmp ugt i32 %x, 4294967294
+  %4 = select i1 %3, i32 %2, i32 -1
+  ret i32 %4
+}

>From 2b6d3063685b43ce1cb63addb6cbdd35d050066d Mon Sep 17 00:00:00 2001
From: Yash Solanki <252yash at gmail.com>
Date: Fri, 13 Jun 2025 13:45:46 +0530
Subject: [PATCH 2/2] [InstCombine] Fold select to cmp with constants in
 non-canonical inequalities

For constant y, inequalities aren't always canonical
so we need to check the conditions such as
- (x > y - 1) ? zext(x != y) : -1
- (x > y - 1) ? zext(x > y) : -1
- (x < y + 1) ? sext(x != y) : 1
- (x < y + 1) ? sext(x < y) : 1
and similary non-strict equalities.

Fold select into scmp/ucmp based on signedness of
the comparison predicate.

Resolves #143259
---
 .../InstCombine/InstCombineSelect.cpp         | 22 ++++++
 .../Transforms/InstCombine/select-to-cmp.ll   | 70 ++++++++-----------
 2 files changed, 52 insertions(+), 40 deletions(-)

diff --git a/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp b/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
index 8f46ae304353d..218f6f2571652 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
@@ -3572,6 +3572,28 @@ Instruction *InstCombinerImpl::foldSelectToCmp(SelectInst &SI) {
   if (!LHS->getType()->isIntOrIntVectorTy())
     return nullptr;
 
+  // If there is no -1, 0 or 1 at TV, then invert the select statement and try
+  // to canonicalize to one of the forms above
+  if (!match(TV, m_AllOnes()) && !match(TV, m_One()) && !match(TV, m_Zero())) {
+    if (!match(FV, m_AllOnes()) && !match(FV, m_One()) && !match(FV, m_Zero()))
+      return nullptr;
+    Pred = ICmpInst::getInverseCmpPredicate(Pred);
+    std::swap(TV, FV);
+  }
+
+  if (ICmpInst::isGE(Pred) || ICmpInst::isLE(Pred)) {
+    if (ConstantInt *C = dyn_cast<ConstantInt>(RHS)) {
+      auto FlippedPredAndConst =
+          getFlippedStrictnessPredicateAndConstant(Pred, C);
+      if (!FlippedPredAndConst)
+        return nullptr;
+      Pred = FlippedPredAndConst->first;
+      RHS = FlippedPredAndConst->second;
+    } else {
+      return nullptr;
+    }
+  }
+
   // Try to swap operands and the predicate. We need to be careful when doing
   // so because two of the patterns have opposite predicates, so use the
   // constant inside select to determine if swapping operands would be
diff --git a/llvm/test/Transforms/InstCombine/select-to-cmp.ll b/llvm/test/Transforms/InstCombine/select-to-cmp.ll
index 72b9a4301a77d..5b97545c97c8c 100644
--- a/llvm/test/Transforms/InstCombine/select-to-cmp.ll
+++ b/llvm/test/Transforms/InstCombine/select-to-cmp.ll
@@ -6,10 +6,7 @@
 define i32 @scmp_x_0_inverted(i32 %x) {
 ; CHECK-LABEL: define i32 @scmp_x_0_inverted(
 ; CHECK-SAME: i32 [[X:%.*]]) {
-; CHECK-NEXT:    [[TMP4:%.*]] = icmp ne i32 [[X]], 0
-; CHECK-NEXT:    [[TMP2:%.*]] = zext i1 [[TMP4]] to i32
-; CHECK-NEXT:    [[TMP3:%.*]] = icmp sgt i32 [[X]], -1
-; CHECK-NEXT:    [[TMP1:%.*]] = select i1 [[TMP3]], i32 [[TMP2]], i32 -1
+; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[X]], i32 0)
 ; CHECK-NEXT:    ret i32 [[TMP1]]
 ;
   %2 = icmp ne i32 %x, 0
@@ -23,10 +20,7 @@ define i32 @scmp_x_0_inverted(i32 %x) {
 define i32 @scmp_x_0_inverted_const_neg10(i32 %x) {
 ; CHECK-LABEL: define i32 @scmp_x_0_inverted_const_neg10(
 ; CHECK-SAME: i32 [[X:%.*]]) {
-; CHECK-NEXT:    [[TMP4:%.*]] = icmp ne i32 [[X]], -10
-; CHECK-NEXT:    [[TMP2:%.*]] = zext i1 [[TMP4]] to i32
-; CHECK-NEXT:    [[TMP3:%.*]] = icmp sgt i32 [[X]], -11
-; CHECK-NEXT:    [[TMP1:%.*]] = select i1 [[TMP3]], i32 [[TMP2]], i32 -1
+; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[X]], i32 -10)
 ; CHECK-NEXT:    ret i32 [[TMP1]]
 ;
   %1 = icmp ne i32 %x, -10
@@ -40,10 +34,7 @@ define i32 @scmp_x_0_inverted_const_neg10(i32 %x) {
 define i8 @scmp_x_0_inverted_i8(i8 %x) {
 ; CHECK-LABEL: define i8 @scmp_x_0_inverted_i8(
 ; CHECK-SAME: i8 [[X:%.*]]) {
-; CHECK-NEXT:    [[TMP4:%.*]] = icmp ne i8 [[X]], 7
-; CHECK-NEXT:    [[TMP2:%.*]] = zext i1 [[TMP4]] to i8
-; CHECK-NEXT:    [[TMP3:%.*]] = icmp sgt i8 [[X]], 6
-; CHECK-NEXT:    [[TMP1:%.*]] = select i1 [[TMP3]], i8 [[TMP2]], i8 -1
+; CHECK-NEXT:    [[TMP1:%.*]] = call i8 @llvm.scmp.i8.i8(i8 [[X]], i8 7)
 ; CHECK-NEXT:    ret i8 [[TMP1]]
 ;
   %1 = icmp ne i8 %x, 7
@@ -57,10 +48,8 @@ define i8 @scmp_x_0_inverted_i8(i8 %x) {
 define i32 @scmp_x_0_inverted_i64_neq(i32 %x) {
 ; CHECK-LABEL: define i32 @scmp_x_0_inverted_i64_neq(
 ; CHECK-SAME: i32 [[X:%.*]]) {
-; CHECK-NEXT:    [[CMP1:%.*]] = icmp ne i32 [[X]], 0
-; CHECK-NEXT:    [[CMP2:%.*]] = icmp sgt i32 [[X]], -1
-; CHECK-NEXT:    [[TMP1:%.*]] = zext i1 [[CMP1]] to i32
-; CHECK-NEXT:    [[RET:%.*]] = select i1 [[CMP2]], i32 [[TMP1]], i32 -1
+; CHECK-NEXT:    [[SEL:%.*]] = call i64 @llvm.scmp.i64.i32(i32 [[X]], i32 0)
+; CHECK-NEXT:    [[RET:%.*]] = trunc i64 [[SEL]] to i32
 ; CHECK-NEXT:    ret i32 [[RET]]
 ;
   %x64 = sext i32 %x to i64
@@ -76,10 +65,8 @@ define i32 @scmp_x_0_inverted_i64_neq(i32 %x) {
 define i32 @scmp_x_0_inverted_i64_sgt(i32 %x) {
 ; CHECK-LABEL: define i32 @scmp_x_0_inverted_i64_sgt(
 ; CHECK-SAME: i32 [[X:%.*]]) {
-; CHECK-NEXT:    [[CMP1:%.*]] = icmp sgt i32 [[X]], 0
-; CHECK-NEXT:    [[CMP2:%.*]] = icmp sgt i32 [[X]], -1
-; CHECK-NEXT:    [[TMP1:%.*]] = zext i1 [[CMP1]] to i32
-; CHECK-NEXT:    [[RET:%.*]] = select i1 [[CMP2]], i32 [[TMP1]], i32 -1
+; CHECK-NEXT:    [[SEL:%.*]] = call i64 @llvm.scmp.i64.i32(i32 [[X]], i32 0)
+; CHECK-NEXT:    [[RET:%.*]] = trunc i64 [[SEL]] to i32
 ; CHECK-NEXT:    ret i32 [[RET]]
 ;
   %x64 = sext i32 %x to i64
@@ -95,10 +82,7 @@ define i32 @scmp_x_0_inverted_i64_sgt(i32 %x) {
 define i32 @scmp_x_0_inverted_const_neg1000(i32 %x) {
 ; CHECK-LABEL: define i32 @scmp_x_0_inverted_const_neg1000(
 ; CHECK-SAME: i32 [[X:%.*]]) {
-; CHECK-NEXT:    [[TMP4:%.*]] = icmp sgt i32 [[X]], -1000
-; CHECK-NEXT:    [[TMP2:%.*]] = zext i1 [[TMP4]] to i32
-; CHECK-NEXT:    [[TMP3:%.*]] = icmp sgt i32 [[X]], -1001
-; CHECK-NEXT:    [[TMP1:%.*]] = select i1 [[TMP3]], i32 [[TMP2]], i32 -1
+; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[X]], i32 -1000)
 ; CHECK-NEXT:    ret i32 [[TMP1]]
 ;
   %1 = icmp sgt i32 %x, -1000
@@ -112,10 +96,7 @@ define i32 @scmp_x_0_inverted_const_neg1000(i32 %x) {
 define i32 @scmp_x_0_inverted_const_1729_sgt(i32 %x) {
 ; CHECK-LABEL: define i32 @scmp_x_0_inverted_const_1729_sgt(
 ; CHECK-SAME: i32 [[X:%.*]]) {
-; CHECK-NEXT:    [[TMP4:%.*]] = icmp sgt i32 [[X]], 1729
-; CHECK-NEXT:    [[TMP2:%.*]] = zext i1 [[TMP4]] to i32
-; CHECK-NEXT:    [[TMP3:%.*]] = icmp sgt i32 [[X]], 1728
-; CHECK-NEXT:    [[TMP1:%.*]] = select i1 [[TMP3]], i32 [[TMP2]], i32 -1
+; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[X]], i32 1729)
 ; CHECK-NEXT:    ret i32 [[TMP1]]
 ;
   %1 = icmp sgt i32 %x, 1729
@@ -129,10 +110,7 @@ define i32 @scmp_x_0_inverted_const_1729_sgt(i32 %x) {
 define i32 @ucmp_x_10_inverted(i32 %x) {
 ; CHECK-LABEL: define i32 @ucmp_x_10_inverted(
 ; CHECK-SAME: i32 [[X:%.*]]) {
-; CHECK-NEXT:    [[TMP4:%.*]] = icmp ne i32 [[X]], 10
-; CHECK-NEXT:    [[TMP2:%.*]] = zext i1 [[TMP4]] to i32
-; CHECK-NEXT:    [[TMP3:%.*]] = icmp ugt i32 [[X]], 9
-; CHECK-NEXT:    [[TMP1:%.*]] = select i1 [[TMP3]], i32 [[TMP2]], i32 -1
+; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.ucmp.i32.i32(i32 [[X]], i32 10)
 ; CHECK-NEXT:    ret i32 [[TMP1]]
 ;
   %1 = icmp ne i32 %x, 10
@@ -146,10 +124,7 @@ define i32 @ucmp_x_10_inverted(i32 %x) {
 define i32 @ucmp_x_neg1_inverted(i32 %x) {
 ; CHECK-LABEL: define i32 @ucmp_x_neg1_inverted(
 ; CHECK-SAME: i32 [[X:%.*]]) {
-; CHECK-NEXT:    [[TMP4:%.*]] = icmp ne i32 [[X]], -3
-; CHECK-NEXT:    [[TMP2:%.*]] = zext i1 [[TMP4]] to i32
-; CHECK-NEXT:    [[TMP3:%.*]] = icmp ugt i32 [[X]], -4
-; CHECK-NEXT:    [[TMP1:%.*]] = select i1 [[TMP3]], i32 [[TMP2]], i32 -1
+; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.ucmp.i32.i32(i32 [[X]], i32 -3)
 ; CHECK-NEXT:    ret i32 [[TMP1]]
 ;
   %1 = icmp ne i32 %x, -3
@@ -163,10 +138,7 @@ define i32 @ucmp_x_neg1_inverted(i32 %x) {
 define i8 @ucmp_x_neg4_i8_ugt(i8 %x) {
 ; CHECK-LABEL: define i8 @ucmp_x_neg4_i8_ugt(
 ; CHECK-SAME: i8 [[X:%.*]]) {
-; CHECK-NEXT:    [[TMP4:%.*]] = icmp ugt i8 [[X]], -4
-; CHECK-NEXT:    [[TMP2:%.*]] = zext i1 [[TMP4]] to i8
-; CHECK-NEXT:    [[TMP3:%.*]] = icmp ugt i8 [[X]], -5
-; CHECK-NEXT:    [[TMP1:%.*]] = select i1 [[TMP3]], i8 [[TMP2]], i8 -1
+; CHECK-NEXT:    [[TMP1:%.*]] = call i8 @llvm.ucmp.i8.i8(i8 [[X]], i8 -4)
 ; CHECK-NEXT:    ret i8 [[TMP1]]
 ;
   %1 = icmp ugt i8 %x, -4
@@ -252,3 +224,21 @@ define i32 @ucmp_x_const_u32max(i32 %x) {
   %4 = select i1 %3, i32 %2, i32 -1
   ret i32 %4
 }
+
+; Don't fold with different signedness
+
+define i32 @different_signedness_neg(i32 %x) {
+; CHECK-LABEL: define i32 @different_signedness_neg(
+; CHECK-SAME: i32 [[X:%.*]]) {
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp ugt i32 [[X]], -10
+; CHECK-NEXT:    [[TMP2:%.*]] = zext i1 [[TMP1]] to i32
+; CHECK-NEXT:    [[TMP3:%.*]] = icmp sgt i32 [[X]], -11
+; CHECK-NEXT:    [[TMP4:%.*]] = select i1 [[TMP3]], i32 [[TMP2]], i32 -1
+; CHECK-NEXT:    ret i32 [[TMP4]]
+;
+  %1 = icmp ugt i32 %x, -10
+  %2 = zext i1 %1 to i32
+  %3 = icmp sgt i32 %x, -11
+  %4 = select i1 %3, i32 %2, i32 -1
+  ret i32 %4
+}



More information about the llvm-commits mailing list