[llvm] 4903c11 - [RISCV] Support memcmp expansion for vectors
via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 12 23:31:51 PDT 2025
Author: Pengcheng Wang
Date: 2025-06-13T14:31:48+08:00
New Revision: 4903c11a7e144d63635b115d97936a7aecf7a2f6
URL: https://github.com/llvm/llvm-project/commit/4903c11a7e144d63635b115d97936a7aecf7a2f6
DIFF: https://github.com/llvm/llvm-project/commit/4903c11a7e144d63635b115d97936a7aecf7a2f6.diff
LOG: [RISCV] Support memcmp expansion for vectors
This patch adds the support of generating vector instructions for
`memcmp`. This implementation is inspired by X86's.
We convert integer comparisons (eq/ne only) into vector comparisons
and do a vector reduction and to get the result.
The range of supported load sizes is (XLEN, VLEN * LMUL8] and
non-power-of-2 types are not supported.
Fixes #143294.
Reviewers: lukel97, asb, preames, topperc, dtcxzyw
Reviewed By: topperc, lukel97
Pull Request: https://github.com/llvm/llvm-project/pull/114517
Added:
Modified:
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
llvm/test/CodeGen/RISCV/memcmp-optsize.ll
llvm/test/CodeGen/RISCV/memcmp.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index a157c94849f37..7839af5c16917 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -16147,17 +16147,80 @@ static bool narrowIndex(SDValue &N, ISD::MemIndexType IndexType, SelectionDAG &D
return true;
}
+/// Try to map an integer comparison with size > XLEN to vector instructions
+/// before type legalization splits it up into chunks.
+static SDValue
+combineVectorSizedSetCCEquality(EVT VT, SDValue X, SDValue Y, ISD::CondCode CC,
+ const SDLoc &DL, SelectionDAG &DAG,
+ const RISCVSubtarget &Subtarget) {
+ assert(ISD::isIntEqualitySetCC(CC) && "Bad comparison predicate");
+
+ if (!Subtarget.hasVInstructions())
+ return SDValue();
+
+ MVT XLenVT = Subtarget.getXLenVT();
+ EVT OpVT = X.getValueType();
+ // We're looking for an oversized integer equality comparison.
+ if (!OpVT.isScalarInteger())
+ return SDValue();
+
+ unsigned OpSize = OpVT.getSizeInBits();
+ // TODO: Support non-power-of-2 types.
+ if (!isPowerOf2_32(OpSize))
+ return SDValue();
+
+ // The size should be larger than XLen and smaller than the maximum vector
+ // size.
+ if (OpSize <= Subtarget.getXLen() ||
+ OpSize > Subtarget.getRealMinVLen() *
+ Subtarget.getMaxLMULForFixedLengthVectors())
+ return SDValue();
+
+ // Don't perform this combine if constructing the vector will be expensive.
+ auto IsVectorBitCastCheap = [](SDValue X) {
+ X = peekThroughBitcasts(X);
+ return isa<ConstantSDNode>(X) || X.getValueType().isVector() ||
+ X.getOpcode() == ISD::LOAD;
+ };
+ if (!IsVectorBitCastCheap(X) || !IsVectorBitCastCheap(Y))
+ return SDValue();
+
+ if (DAG.getMachineFunction().getFunction().hasFnAttribute(
+ Attribute::NoImplicitFloat))
+ return SDValue();
+
+ unsigned VecSize = OpSize / 8;
+ EVT VecVT = MVT::getVectorVT(MVT::i8, VecSize);
+ EVT CmpVT = MVT::getVectorVT(MVT::i1, VecSize);
+
+ SDValue VecX = DAG.getBitcast(VecVT, X);
+ SDValue VecY = DAG.getBitcast(VecVT, Y);
+ SDValue Cmp = DAG.getSetCC(DL, CmpVT, VecX, VecY, ISD::SETNE);
+ return DAG.getSetCC(DL, VT, DAG.getNode(ISD::VECREDUCE_OR, DL, XLenVT, Cmp),
+ DAG.getConstant(0, DL, XLenVT), CC);
+}
+
// Replace (seteq (i64 (and X, 0xffffffff)), C1) with
// (seteq (i64 (sext_inreg (X, i32)), C1')) where C1' is C1 sign extended from
// bit 31. Same for setne. C1' may be cheaper to materialize and the sext_inreg
// can become a sext.w instead of a shift pair.
static SDValue performSETCCCombine(SDNode *N, SelectionDAG &DAG,
const RISCVSubtarget &Subtarget) {
+ SDLoc dl(N);
SDValue N0 = N->getOperand(0);
SDValue N1 = N->getOperand(1);
EVT VT = N->getValueType(0);
EVT OpVT = N0.getValueType();
+ ISD::CondCode Cond = cast<CondCodeSDNode>(N->getOperand(2))->get();
+ // Looking for an equality compare.
+ if (!isIntEqualitySetCC(Cond))
+ return SDValue();
+
+ if (SDValue V =
+ combineVectorSizedSetCCEquality(VT, N0, N1, Cond, dl, DAG, Subtarget))
+ return V;
+
if (OpVT != MVT::i64 || !Subtarget.is64Bit())
return SDValue();
@@ -16172,11 +16235,6 @@ static SDValue performSETCCCombine(SDNode *N, SelectionDAG &DAG,
N0.getConstantOperandVal(1) != UINT64_C(0xffffffff))
return SDValue();
- // Looking for an equality compare.
- ISD::CondCode Cond = cast<CondCodeSDNode>(N->getOperand(2))->get();
- if (!isIntEqualitySetCC(Cond))
- return SDValue();
-
// Don't do this if the sign bit is provably zero, it will be turned back into
// an AND.
APInt SignMask = APInt::getOneBitSet(64, 31);
@@ -16185,7 +16243,6 @@ static SDValue performSETCCCombine(SDNode *N, SelectionDAG &DAG,
const APInt &C1 = N1C->getAPIntValue();
- SDLoc dl(N);
// If the constant is larger than 2^32 - 1 it is impossible for both sides
// to be equal.
if (C1.getActiveBits() > 32)
diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
index d5ea0c5d52293..bee47527cf428 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
@@ -2952,5 +2952,22 @@ RISCVTTIImpl::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const {
Options.LoadSizes = {4, 2, 1};
Options.AllowedTailExpansions = {3};
}
+
+ if (IsZeroCmp && ST->hasVInstructions()) {
+ unsigned RealMinVLen = ST->getRealMinVLen();
+ // Support Fractional LMULs if the lengths are larger than XLen.
+ // TODO: Support non-power-of-2 types.
+ for (unsigned FLMUL = 8; FLMUL >= 2; FLMUL /= 2) {
+ unsigned Len = RealMinVLen / FLMUL;
+ if (Len > ST->getXLen())
+ Options.LoadSizes.insert(Options.LoadSizes.begin(), Len / 8);
+ }
+ for (unsigned LMUL = 1; LMUL <= ST->getMaxLMULForFixedLengthVectors();
+ LMUL *= 2) {
+ unsigned Len = RealMinVLen * LMUL;
+ if (Len > ST->getXLen())
+ Options.LoadSizes.insert(Options.LoadSizes.begin(), Len / 8);
+ }
+ }
return Options;
}
diff --git a/llvm/test/CodeGen/RISCV/memcmp-optsize.ll b/llvm/test/CodeGen/RISCV/memcmp-optsize.ll
index 38cd51c074594..3742383675b96 100644
--- a/llvm/test/CodeGen/RISCV/memcmp-optsize.ll
+++ b/llvm/test/CodeGen/RISCV/memcmp-optsize.ll
@@ -870,13 +870,11 @@ define i32 @bcmp_size_8(ptr %s1, ptr %s2) nounwind optsize {
;
; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_size_8:
; CHECK-UNALIGNED-RV32-V: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a0, 4(a0)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a3, 0(a1)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a1, 4(a1)
-; CHECK-UNALIGNED-RV32-V-NEXT: xor a2, a2, a3
-; CHECK-UNALIGNED-RV32-V-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV32-V-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
+; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v8, (a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v9, (a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: vmsne.vv v8, v8, v9
+; CHECK-UNALIGNED-RV32-V-NEXT: vcpop.m a0, v8
; CHECK-UNALIGNED-RV32-V-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV32-V-NEXT: ret
;
@@ -1073,18 +1071,18 @@ define i32 @bcmp_size_15(ptr %s1, ptr %s2) nounwind optsize {
; CHECK-UNALIGNED-RV32-V: # %bb.0: # %entry
; CHECK-UNALIGNED-RV32-V-NEXT: lw a2, 0(a0)
; CHECK-UNALIGNED-RV32-V-NEXT: lw a3, 4(a0)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a4, 8(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a4, 7(a0)
; CHECK-UNALIGNED-RV32-V-NEXT: lw a0, 11(a0)
; CHECK-UNALIGNED-RV32-V-NEXT: lw a5, 0(a1)
; CHECK-UNALIGNED-RV32-V-NEXT: lw a6, 4(a1)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a7, 8(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a7, 7(a1)
; CHECK-UNALIGNED-RV32-V-NEXT: lw a1, 11(a1)
; CHECK-UNALIGNED-RV32-V-NEXT: xor a2, a2, a5
; CHECK-UNALIGNED-RV32-V-NEXT: xor a3, a3, a6
; CHECK-UNALIGNED-RV32-V-NEXT: xor a4, a4, a7
; CHECK-UNALIGNED-RV32-V-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV32-V-NEXT: or a2, a2, a3
-; CHECK-UNALIGNED-RV32-V-NEXT: or a0, a4, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: or a0, a3, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: or a2, a2, a4
; CHECK-UNALIGNED-RV32-V-NEXT: or a0, a2, a0
; CHECK-UNALIGNED-RV32-V-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV32-V-NEXT: ret
@@ -1284,33 +1282,21 @@ define i32 @bcmp_size_16(ptr %s1, ptr %s2) nounwind optsize {
;
; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_size_16:
; CHECK-UNALIGNED-RV32-V: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a3, 4(a0)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a4, 8(a0)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a0, 12(a0)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a5, 0(a1)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a6, 4(a1)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a7, 8(a1)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a1, 12(a1)
-; CHECK-UNALIGNED-RV32-V-NEXT: xor a2, a2, a5
-; CHECK-UNALIGNED-RV32-V-NEXT: xor a3, a3, a6
-; CHECK-UNALIGNED-RV32-V-NEXT: xor a4, a4, a7
-; CHECK-UNALIGNED-RV32-V-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV32-V-NEXT: or a2, a2, a3
-; CHECK-UNALIGNED-RV32-V-NEXT: or a0, a4, a0
-; CHECK-UNALIGNED-RV32-V-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: vsetivli zero, 16, e8, m1, ta, ma
+; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v8, (a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v9, (a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: vmsne.vv v8, v8, v9
+; CHECK-UNALIGNED-RV32-V-NEXT: vcpop.m a0, v8
; CHECK-UNALIGNED-RV32-V-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV32-V-NEXT: ret
;
; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_size_16:
; CHECK-UNALIGNED-RV64-V: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a2, 0(a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a0, 8(a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a3, 0(a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a1, 8(a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: xor a2, a2, a3
-; CHECK-UNALIGNED-RV64-V-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV64-V-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV64-V-NEXT: vsetivli zero, 16, e8, m1, ta, ma
+; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v8, (a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v9, (a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: vmsne.vv v8, v8, v9
+; CHECK-UNALIGNED-RV64-V-NEXT: vcpop.m a0, v8
; CHECK-UNALIGNED-RV64-V-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-V-NEXT: ret
entry:
@@ -1319,15 +1305,15 @@ entry:
}
define i32 @bcmp_size_31(ptr %s1, ptr %s2) nounwind optsize {
-; CHECK-RV32-LABEL: bcmp_size_31:
-; CHECK-RV32: # %bb.0: # %entry
-; CHECK-RV32-NEXT: addi sp, sp, -16
-; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-RV32-NEXT: li a2, 31
-; CHECK-RV32-NEXT: call bcmp
-; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-RV32-NEXT: addi sp, sp, 16
-; CHECK-RV32-NEXT: ret
+; CHECK-ALIGNED-RV32-LABEL: bcmp_size_31:
+; CHECK-ALIGNED-RV32: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-NEXT: li a2, 31
+; CHECK-ALIGNED-RV32-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-NEXT: ret
;
; CHECK-ALIGNED-RV64-LABEL: bcmp_size_31:
; CHECK-ALIGNED-RV64: # %bb.0: # %entry
@@ -1339,6 +1325,16 @@ define i32 @bcmp_size_31(ptr %s1, ptr %s2) nounwind optsize {
; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-NEXT: ret
;
+; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_size_31:
+; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 31
+; CHECK-ALIGNED-RV32-ZBB-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
+;
; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_size_31:
; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
@@ -1349,6 +1345,16 @@ define i32 @bcmp_size_31(ptr %s1, ptr %s2) nounwind optsize {
; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
;
+; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_size_31:
+; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 31
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
+;
; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_size_31:
; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
@@ -1359,6 +1365,16 @@ define i32 @bcmp_size_31(ptr %s1, ptr %s2) nounwind optsize {
; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
;
+; CHECK-ALIGNED-RV32-V-LABEL: bcmp_size_31:
+; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-V-NEXT: li a2, 31
+; CHECK-ALIGNED-RV32-V-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-V-NEXT: ret
+;
; CHECK-ALIGNED-RV64-V-LABEL: bcmp_size_31:
; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
@@ -1369,6 +1385,16 @@ define i32 @bcmp_size_31(ptr %s1, ptr %s2) nounwind optsize {
; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-V-NEXT: ret
;
+; CHECK-UNALIGNED-RV32-LABEL: bcmp_size_31:
+; CHECK-UNALIGNED-RV32: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-NEXT: li a2, 31
+; CHECK-UNALIGNED-RV32-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-NEXT: ret
+;
; CHECK-UNALIGNED-RV64-LABEL: bcmp_size_31:
; CHECK-UNALIGNED-RV64: # %bb.0: # %entry
; CHECK-UNALIGNED-RV64-NEXT: ld a2, 0(a0)
@@ -1389,6 +1415,16 @@ define i32 @bcmp_size_31(ptr %s1, ptr %s2) nounwind optsize {
; CHECK-UNALIGNED-RV64-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-NEXT: ret
;
+; CHECK-UNALIGNED-RV32-ZBB-LABEL: bcmp_size_31:
+; CHECK-UNALIGNED-RV32-ZBB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: li a2, 31
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: ret
+;
; CHECK-UNALIGNED-RV64-ZBB-LABEL: bcmp_size_31:
; CHECK-UNALIGNED-RV64-ZBB: # %bb.0: # %entry
; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a2, 0(a0)
@@ -1409,6 +1445,16 @@ define i32 @bcmp_size_31(ptr %s1, ptr %s2) nounwind optsize {
; CHECK-UNALIGNED-RV64-ZBB-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-ZBB-NEXT: ret
;
+; CHECK-UNALIGNED-RV32-ZBKB-LABEL: bcmp_size_31:
+; CHECK-UNALIGNED-RV32-ZBKB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: li a2, 31
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: ret
+;
; CHECK-UNALIGNED-RV64-ZBKB-LABEL: bcmp_size_31:
; CHECK-UNALIGNED-RV64-ZBKB: # %bb.0: # %entry
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a2, 0(a0)
@@ -1429,22 +1475,58 @@ define i32 @bcmp_size_31(ptr %s1, ptr %s2) nounwind optsize {
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ret
;
+; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_size_31:
+; CHECK-UNALIGNED-RV32-V: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a2, 0(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a3, 4(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a4, 8(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a5, 12(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a6, 0(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a7, 4(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t0, 8(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t1, 12(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t2, 15(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t3, 19(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t4, 23(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a0, 27(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a3, a3, a7
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a5, a5, t1
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a7, 15(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t1, 19(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t5, 23(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a1, 27(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a2, a2, a6
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a4, a4, t0
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a6, t3, t1
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a1, t2, a7
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a7, t4, t5
+; CHECK-UNALIGNED-RV32-V-NEXT: or a4, a4, a7
+; CHECK-UNALIGNED-RV32-V-NEXT: or a1, a2, a1
+; CHECK-UNALIGNED-RV32-V-NEXT: or a0, a5, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: or a2, a3, a6
+; CHECK-UNALIGNED-RV32-V-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: or a1, a1, a4
+; CHECK-UNALIGNED-RV32-V-NEXT: or a0, a1, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: snez a0, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: ret
+;
; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_size_31:
; CHECK-UNALIGNED-RV64-V: # %bb.0: # %entry
; CHECK-UNALIGNED-RV64-V-NEXT: ld a2, 0(a0)
; CHECK-UNALIGNED-RV64-V-NEXT: ld a3, 8(a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a4, 16(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld a4, 15(a0)
; CHECK-UNALIGNED-RV64-V-NEXT: ld a0, 23(a0)
; CHECK-UNALIGNED-RV64-V-NEXT: ld a5, 0(a1)
; CHECK-UNALIGNED-RV64-V-NEXT: ld a6, 8(a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a7, 16(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld a7, 15(a1)
; CHECK-UNALIGNED-RV64-V-NEXT: ld a1, 23(a1)
; CHECK-UNALIGNED-RV64-V-NEXT: xor a2, a2, a5
; CHECK-UNALIGNED-RV64-V-NEXT: xor a3, a3, a6
; CHECK-UNALIGNED-RV64-V-NEXT: xor a4, a4, a7
; CHECK-UNALIGNED-RV64-V-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV64-V-NEXT: or a2, a2, a3
-; CHECK-UNALIGNED-RV64-V-NEXT: or a0, a4, a0
+; CHECK-UNALIGNED-RV64-V-NEXT: or a0, a3, a0
+; CHECK-UNALIGNED-RV64-V-NEXT: or a2, a2, a4
; CHECK-UNALIGNED-RV64-V-NEXT: or a0, a2, a0
; CHECK-UNALIGNED-RV64-V-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-V-NEXT: ret
@@ -1454,15 +1536,15 @@ entry:
}
define i32 @bcmp_size_32(ptr %s1, ptr %s2) nounwind optsize {
-; CHECK-RV32-LABEL: bcmp_size_32:
-; CHECK-RV32: # %bb.0: # %entry
-; CHECK-RV32-NEXT: addi sp, sp, -16
-; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-RV32-NEXT: li a2, 32
-; CHECK-RV32-NEXT: call bcmp
-; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-RV32-NEXT: addi sp, sp, 16
-; CHECK-RV32-NEXT: ret
+; CHECK-ALIGNED-RV32-LABEL: bcmp_size_32:
+; CHECK-ALIGNED-RV32: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-NEXT: li a2, 32
+; CHECK-ALIGNED-RV32-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-NEXT: ret
;
; CHECK-ALIGNED-RV64-LABEL: bcmp_size_32:
; CHECK-ALIGNED-RV64: # %bb.0: # %entry
@@ -1474,6 +1556,16 @@ define i32 @bcmp_size_32(ptr %s1, ptr %s2) nounwind optsize {
; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-NEXT: ret
;
+; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_size_32:
+; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 32
+; CHECK-ALIGNED-RV32-ZBB-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
+;
; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_size_32:
; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
@@ -1484,6 +1576,16 @@ define i32 @bcmp_size_32(ptr %s1, ptr %s2) nounwind optsize {
; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
;
+; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_size_32:
+; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 32
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
+;
; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_size_32:
; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
@@ -1494,6 +1596,16 @@ define i32 @bcmp_size_32(ptr %s1, ptr %s2) nounwind optsize {
; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
;
+; CHECK-ALIGNED-RV32-V-LABEL: bcmp_size_32:
+; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-V-NEXT: li a2, 32
+; CHECK-ALIGNED-RV32-V-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-V-NEXT: ret
+;
; CHECK-ALIGNED-RV64-V-LABEL: bcmp_size_32:
; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
@@ -1504,6 +1616,16 @@ define i32 @bcmp_size_32(ptr %s1, ptr %s2) nounwind optsize {
; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-V-NEXT: ret
;
+; CHECK-UNALIGNED-RV32-LABEL: bcmp_size_32:
+; CHECK-UNALIGNED-RV32: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-NEXT: li a2, 32
+; CHECK-UNALIGNED-RV32-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-NEXT: ret
+;
; CHECK-UNALIGNED-RV64-LABEL: bcmp_size_32:
; CHECK-UNALIGNED-RV64: # %bb.0: # %entry
; CHECK-UNALIGNED-RV64-NEXT: ld a2, 0(a0)
@@ -1524,6 +1646,16 @@ define i32 @bcmp_size_32(ptr %s1, ptr %s2) nounwind optsize {
; CHECK-UNALIGNED-RV64-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-NEXT: ret
;
+; CHECK-UNALIGNED-RV32-ZBB-LABEL: bcmp_size_32:
+; CHECK-UNALIGNED-RV32-ZBB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: li a2, 32
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: ret
+;
; CHECK-UNALIGNED-RV64-ZBB-LABEL: bcmp_size_32:
; CHECK-UNALIGNED-RV64-ZBB: # %bb.0: # %entry
; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a2, 0(a0)
@@ -1544,6 +1676,16 @@ define i32 @bcmp_size_32(ptr %s1, ptr %s2) nounwind optsize {
; CHECK-UNALIGNED-RV64-ZBB-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-ZBB-NEXT: ret
;
+; CHECK-UNALIGNED-RV32-ZBKB-LABEL: bcmp_size_32:
+; CHECK-UNALIGNED-RV32-ZBKB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: li a2, 32
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: ret
+;
; CHECK-UNALIGNED-RV64-ZBKB-LABEL: bcmp_size_32:
; CHECK-UNALIGNED-RV64-ZBKB: # %bb.0: # %entry
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a2, 0(a0)
@@ -1564,23 +1706,25 @@ define i32 @bcmp_size_32(ptr %s1, ptr %s2) nounwind optsize {
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ret
;
+; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_size_32:
+; CHECK-UNALIGNED-RV32-V: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-V-NEXT: li a2, 32
+; CHECK-UNALIGNED-RV32-V-NEXT: vsetvli zero, a2, e8, m2, ta, ma
+; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v8, (a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v10, (a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: vmsne.vv v12, v8, v10
+; CHECK-UNALIGNED-RV32-V-NEXT: vcpop.m a0, v12
+; CHECK-UNALIGNED-RV32-V-NEXT: snez a0, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: ret
+;
; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_size_32:
; CHECK-UNALIGNED-RV64-V: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a2, 0(a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a3, 8(a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a4, 16(a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a0, 24(a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a5, 0(a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a6, 8(a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a7, 16(a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a1, 24(a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: xor a2, a2, a5
-; CHECK-UNALIGNED-RV64-V-NEXT: xor a3, a3, a6
-; CHECK-UNALIGNED-RV64-V-NEXT: xor a4, a4, a7
-; CHECK-UNALIGNED-RV64-V-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV64-V-NEXT: or a2, a2, a3
-; CHECK-UNALIGNED-RV64-V-NEXT: or a0, a4, a0
-; CHECK-UNALIGNED-RV64-V-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV64-V-NEXT: li a2, 32
+; CHECK-UNALIGNED-RV64-V-NEXT: vsetvli zero, a2, e8, m2, ta, ma
+; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v8, (a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v10, (a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: vmsne.vv v12, v8, v10
+; CHECK-UNALIGNED-RV64-V-NEXT: vcpop.m a0, v12
; CHECK-UNALIGNED-RV64-V-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-V-NEXT: ret
entry:
@@ -1589,100 +1733,1020 @@ entry:
}
define i32 @bcmp_size_63(ptr %s1, ptr %s2) nounwind optsize {
-; CHECK-RV32-LABEL: bcmp_size_63:
-; CHECK-RV32: # %bb.0: # %entry
-; CHECK-RV32-NEXT: addi sp, sp, -16
-; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-RV32-NEXT: li a2, 63
-; CHECK-RV32-NEXT: call bcmp
-; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-RV32-NEXT: addi sp, sp, 16
-; CHECK-RV32-NEXT: ret
+; CHECK-ALIGNED-RV32-LABEL: bcmp_size_63:
+; CHECK-ALIGNED-RV32: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-NEXT: li a2, 63
+; CHECK-ALIGNED-RV32-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-NEXT: ret
;
-; CHECK-RV64-LABEL: bcmp_size_63:
-; CHECK-RV64: # %bb.0: # %entry
-; CHECK-RV64-NEXT: addi sp, sp, -16
-; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-RV64-NEXT: li a2, 63
-; CHECK-RV64-NEXT: call bcmp
-; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-RV64-NEXT: addi sp, sp, 16
-; CHECK-RV64-NEXT: ret
-entry:
- %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 63)
- ret i32 %bcmp
-}
-
-define i32 @bcmp_size_64(ptr %s1, ptr %s2) nounwind optsize {
-; CHECK-RV32-LABEL: bcmp_size_64:
-; CHECK-RV32: # %bb.0: # %entry
-; CHECK-RV32-NEXT: addi sp, sp, -16
-; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-RV32-NEXT: li a2, 64
-; CHECK-RV32-NEXT: call bcmp
-; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-RV32-NEXT: addi sp, sp, 16
-; CHECK-RV32-NEXT: ret
+; CHECK-ALIGNED-RV64-LABEL: bcmp_size_63:
+; CHECK-ALIGNED-RV64: # %bb.0: # %entry
+; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-ALIGNED-RV64-NEXT: li a2, 63
+; CHECK-ALIGNED-RV64-NEXT: call bcmp
+; CHECK-ALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-NEXT: ret
;
-; CHECK-RV64-LABEL: bcmp_size_64:
-; CHECK-RV64: # %bb.0: # %entry
-; CHECK-RV64-NEXT: addi sp, sp, -16
-; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-RV64-NEXT: li a2, 64
-; CHECK-RV64-NEXT: call bcmp
-; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-RV64-NEXT: addi sp, sp, 16
-; CHECK-RV64-NEXT: ret
-entry:
- %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 64)
- ret i32 %bcmp
-}
-
-define i32 @bcmp_size_127(ptr %s1, ptr %s2) nounwind optsize {
-; CHECK-RV32-LABEL: bcmp_size_127:
-; CHECK-RV32: # %bb.0: # %entry
-; CHECK-RV32-NEXT: addi sp, sp, -16
-; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-RV32-NEXT: li a2, 127
-; CHECK-RV32-NEXT: call bcmp
-; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-RV32-NEXT: addi sp, sp, 16
-; CHECK-RV32-NEXT: ret
+; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_size_63:
+; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 63
+; CHECK-ALIGNED-RV32-ZBB-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
;
-; CHECK-RV64-LABEL: bcmp_size_127:
-; CHECK-RV64: # %bb.0: # %entry
-; CHECK-RV64-NEXT: addi sp, sp, -16
-; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-RV64-NEXT: li a2, 127
-; CHECK-RV64-NEXT: call bcmp
-; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-RV64-NEXT: addi sp, sp, 16
-; CHECK-RV64-NEXT: ret
-entry:
- %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 127)
- ret i32 %bcmp
-}
-
-define i32 @bcmp_size_128(ptr %s1, ptr %s2) nounwind optsize {
-; CHECK-RV32-LABEL: bcmp_size_128:
-; CHECK-RV32: # %bb.0: # %entry
-; CHECK-RV32-NEXT: addi sp, sp, -16
-; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-RV32-NEXT: li a2, 128
-; CHECK-RV32-NEXT: call bcmp
-; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-RV32-NEXT: addi sp, sp, 16
-; CHECK-RV32-NEXT: ret
+; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_size_63:
+; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 63
+; CHECK-ALIGNED-RV64-ZBB-NEXT: call bcmp
+; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
;
-; CHECK-RV64-LABEL: bcmp_size_128:
-; CHECK-RV64: # %bb.0: # %entry
-; CHECK-RV64-NEXT: addi sp, sp, -16
-; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-RV64-NEXT: li a2, 128
-; CHECK-RV64-NEXT: call bcmp
-; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-RV64-NEXT: addi sp, sp, 16
-; CHECK-RV64-NEXT: ret
+; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_size_63:
+; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 63
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
+;
+; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_size_63:
+; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 63
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: call bcmp
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
+;
+; CHECK-ALIGNED-RV32-V-LABEL: bcmp_size_63:
+; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-V-NEXT: li a2, 63
+; CHECK-ALIGNED-RV32-V-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-V-NEXT: ret
+;
+; CHECK-ALIGNED-RV64-V-LABEL: bcmp_size_63:
+; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
+; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV64-V-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-ALIGNED-RV64-V-NEXT: li a2, 63
+; CHECK-ALIGNED-RV64-V-NEXT: call bcmp
+; CHECK-ALIGNED-RV64-V-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-V-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-LABEL: bcmp_size_63:
+; CHECK-UNALIGNED-RV32: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-NEXT: li a2, 63
+; CHECK-UNALIGNED-RV32-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-LABEL: bcmp_size_63:
+; CHECK-UNALIGNED-RV64: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-NEXT: li a2, 63
+; CHECK-UNALIGNED-RV64-NEXT: call bcmp
+; CHECK-UNALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV64-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-ZBB-LABEL: bcmp_size_63:
+; CHECK-UNALIGNED-RV32-ZBB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: li a2, 63
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-ZBB-LABEL: bcmp_size_63:
+; CHECK-UNALIGNED-RV64-ZBB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: li a2, 63
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-ZBKB-LABEL: bcmp_size_63:
+; CHECK-UNALIGNED-RV32-ZBKB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: li a2, 63
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-ZBKB-LABEL: bcmp_size_63:
+; CHECK-UNALIGNED-RV64-ZBKB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: li a2, 63
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_size_63:
+; CHECK-UNALIGNED-RV32-V: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-V-NEXT: addi sp, sp, -48
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s0, 44(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s1, 40(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s2, 36(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s3, 32(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s4, 28(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s5, 24(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s6, 20(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s7, 16(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s8, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s9, 8(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s10, 4(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a2, 16(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a3, 20(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a4, 24(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a5, 28(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a6, 0(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a7, 4(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t0, 8(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t1, 12(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t2, 16(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t3, 20(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t4, 24(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t5, 28(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t6, 0(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s0, 4(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s1, 8(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s2, 12(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s3, 47(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s4, 51(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s5, 55(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s6, 59(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s7, 31(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s8, 35(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s9, 39(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a0, 43(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor t1, t1, s2
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a5, a5, t5
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a7, a7, s0
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t5, 31(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s0, 35(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s2, 39(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s10, 43(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a3, a3, t3
+; CHECK-UNALIGNED-RV32-V-NEXT: xor t0, t0, s1
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a4, a4, t4
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t3, 47(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t4, 51(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s1, 55(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a1, 59(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a6, a6, t6
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a2, a2, t2
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a0, a0, s10
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a1, s6, a1
+; CHECK-UNALIGNED-RV32-V-NEXT: xor t2, s8, s0
+; CHECK-UNALIGNED-RV32-V-NEXT: xor t4, s4, t4
+; CHECK-UNALIGNED-RV32-V-NEXT: xor t6, s9, s2
+; CHECK-UNALIGNED-RV32-V-NEXT: xor s0, s5, s1
+; CHECK-UNALIGNED-RV32-V-NEXT: xor t5, s7, t5
+; CHECK-UNALIGNED-RV32-V-NEXT: xor t3, s3, t3
+; CHECK-UNALIGNED-RV32-V-NEXT: or a2, a2, t3
+; CHECK-UNALIGNED-RV32-V-NEXT: or a6, a6, t5
+; CHECK-UNALIGNED-RV32-V-NEXT: or a4, a4, s0
+; CHECK-UNALIGNED-RV32-V-NEXT: or t0, t0, t6
+; CHECK-UNALIGNED-RV32-V-NEXT: or a3, a3, t4
+; CHECK-UNALIGNED-RV32-V-NEXT: or a7, a7, t2
+; CHECK-UNALIGNED-RV32-V-NEXT: or a1, a5, a1
+; CHECK-UNALIGNED-RV32-V-NEXT: or a0, t1, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: or a0, a0, a1
+; CHECK-UNALIGNED-RV32-V-NEXT: or a1, a7, a3
+; CHECK-UNALIGNED-RV32-V-NEXT: or a3, t0, a4
+; CHECK-UNALIGNED-RV32-V-NEXT: or a2, a6, a2
+; CHECK-UNALIGNED-RV32-V-NEXT: or a0, a1, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: or a2, a2, a3
+; CHECK-UNALIGNED-RV32-V-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: snez a0, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s0, 44(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s1, 40(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s2, 36(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s3, 32(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s4, 28(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s5, 24(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s6, 20(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s7, 16(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s8, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s9, 8(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s10, 4(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: addi sp, sp, 48
+; CHECK-UNALIGNED-RV32-V-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_size_63:
+; CHECK-UNALIGNED-RV64-V: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-V-NEXT: ld a2, 0(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld a3, 8(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld a4, 16(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld a5, 24(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld a6, 0(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld a7, 8(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld t0, 16(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld t1, 24(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld t2, 31(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld t3, 39(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld t4, 47(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld a0, 55(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: xor a3, a3, a7
+; CHECK-UNALIGNED-RV64-V-NEXT: xor a5, a5, t1
+; CHECK-UNALIGNED-RV64-V-NEXT: ld a7, 31(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld t1, 39(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld t5, 47(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld a1, 55(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: xor a2, a2, a6
+; CHECK-UNALIGNED-RV64-V-NEXT: xor a4, a4, t0
+; CHECK-UNALIGNED-RV64-V-NEXT: xor a6, t3, t1
+; CHECK-UNALIGNED-RV64-V-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV64-V-NEXT: xor a1, t2, a7
+; CHECK-UNALIGNED-RV64-V-NEXT: xor a7, t4, t5
+; CHECK-UNALIGNED-RV64-V-NEXT: or a4, a4, a7
+; CHECK-UNALIGNED-RV64-V-NEXT: or a1, a2, a1
+; CHECK-UNALIGNED-RV64-V-NEXT: or a0, a5, a0
+; CHECK-UNALIGNED-RV64-V-NEXT: or a2, a3, a6
+; CHECK-UNALIGNED-RV64-V-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV64-V-NEXT: or a1, a1, a4
+; CHECK-UNALIGNED-RV64-V-NEXT: or a0, a1, a0
+; CHECK-UNALIGNED-RV64-V-NEXT: snez a0, a0
+; CHECK-UNALIGNED-RV64-V-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 63)
+ ret i32 %bcmp
+}
+
+define i32 @bcmp_size_64(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-ALIGNED-RV32-LABEL: bcmp_size_64:
+; CHECK-ALIGNED-RV32: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-NEXT: li a2, 64
+; CHECK-ALIGNED-RV32-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-NEXT: ret
+;
+; CHECK-ALIGNED-RV64-LABEL: bcmp_size_64:
+; CHECK-ALIGNED-RV64: # %bb.0: # %entry
+; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-ALIGNED-RV64-NEXT: li a2, 64
+; CHECK-ALIGNED-RV64-NEXT: call bcmp
+; CHECK-ALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-NEXT: ret
+;
+; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_size_64:
+; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 64
+; CHECK-ALIGNED-RV32-ZBB-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
+;
+; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_size_64:
+; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 64
+; CHECK-ALIGNED-RV64-ZBB-NEXT: call bcmp
+; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
+;
+; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_size_64:
+; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 64
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
+;
+; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_size_64:
+; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 64
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: call bcmp
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
+;
+; CHECK-ALIGNED-RV32-V-LABEL: bcmp_size_64:
+; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-V-NEXT: li a2, 64
+; CHECK-ALIGNED-RV32-V-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-V-NEXT: ret
+;
+; CHECK-ALIGNED-RV64-V-LABEL: bcmp_size_64:
+; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
+; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV64-V-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-ALIGNED-RV64-V-NEXT: li a2, 64
+; CHECK-ALIGNED-RV64-V-NEXT: call bcmp
+; CHECK-ALIGNED-RV64-V-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-V-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-LABEL: bcmp_size_64:
+; CHECK-UNALIGNED-RV32: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-NEXT: li a2, 64
+; CHECK-UNALIGNED-RV32-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-LABEL: bcmp_size_64:
+; CHECK-UNALIGNED-RV64: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-NEXT: li a2, 64
+; CHECK-UNALIGNED-RV64-NEXT: call bcmp
+; CHECK-UNALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV64-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-ZBB-LABEL: bcmp_size_64:
+; CHECK-UNALIGNED-RV32-ZBB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: li a2, 64
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-ZBB-LABEL: bcmp_size_64:
+; CHECK-UNALIGNED-RV64-ZBB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: li a2, 64
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-ZBKB-LABEL: bcmp_size_64:
+; CHECK-UNALIGNED-RV32-ZBKB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: li a2, 64
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-ZBKB-LABEL: bcmp_size_64:
+; CHECK-UNALIGNED-RV64-ZBKB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: li a2, 64
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_size_64:
+; CHECK-UNALIGNED-RV32-V: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-V-NEXT: li a2, 64
+; CHECK-UNALIGNED-RV32-V-NEXT: vsetvli zero, a2, e8, m4, ta, ma
+; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v8, (a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v12, (a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: vmsne.vv v16, v8, v12
+; CHECK-UNALIGNED-RV32-V-NEXT: vcpop.m a0, v16
+; CHECK-UNALIGNED-RV32-V-NEXT: snez a0, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_size_64:
+; CHECK-UNALIGNED-RV64-V: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-V-NEXT: li a2, 64
+; CHECK-UNALIGNED-RV64-V-NEXT: vsetvli zero, a2, e8, m4, ta, ma
+; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v8, (a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v12, (a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: vmsne.vv v16, v8, v12
+; CHECK-UNALIGNED-RV64-V-NEXT: vcpop.m a0, v16
+; CHECK-UNALIGNED-RV64-V-NEXT: snez a0, a0
+; CHECK-UNALIGNED-RV64-V-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 64)
+ ret i32 %bcmp
+}
+
+define i32 @bcmp_size_127(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-ALIGNED-RV32-LABEL: bcmp_size_127:
+; CHECK-ALIGNED-RV32: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-NEXT: li a2, 127
+; CHECK-ALIGNED-RV32-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-NEXT: ret
+;
+; CHECK-ALIGNED-RV64-LABEL: bcmp_size_127:
+; CHECK-ALIGNED-RV64: # %bb.0: # %entry
+; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-ALIGNED-RV64-NEXT: li a2, 127
+; CHECK-ALIGNED-RV64-NEXT: call bcmp
+; CHECK-ALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-NEXT: ret
+;
+; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_size_127:
+; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 127
+; CHECK-ALIGNED-RV32-ZBB-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
+;
+; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_size_127:
+; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 127
+; CHECK-ALIGNED-RV64-ZBB-NEXT: call bcmp
+; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
+;
+; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_size_127:
+; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 127
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
+;
+; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_size_127:
+; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 127
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: call bcmp
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
+;
+; CHECK-ALIGNED-RV32-V-LABEL: bcmp_size_127:
+; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-V-NEXT: li a2, 127
+; CHECK-ALIGNED-RV32-V-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-V-NEXT: ret
+;
+; CHECK-ALIGNED-RV64-V-LABEL: bcmp_size_127:
+; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
+; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV64-V-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-ALIGNED-RV64-V-NEXT: li a2, 127
+; CHECK-ALIGNED-RV64-V-NEXT: call bcmp
+; CHECK-ALIGNED-RV64-V-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-V-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-LABEL: bcmp_size_127:
+; CHECK-UNALIGNED-RV32: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-NEXT: li a2, 127
+; CHECK-UNALIGNED-RV32-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-LABEL: bcmp_size_127:
+; CHECK-UNALIGNED-RV64: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-NEXT: li a2, 127
+; CHECK-UNALIGNED-RV64-NEXT: call bcmp
+; CHECK-UNALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV64-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-ZBB-LABEL: bcmp_size_127:
+; CHECK-UNALIGNED-RV32-ZBB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: li a2, 127
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-ZBB-LABEL: bcmp_size_127:
+; CHECK-UNALIGNED-RV64-ZBB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: li a2, 127
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-ZBKB-LABEL: bcmp_size_127:
+; CHECK-UNALIGNED-RV32-ZBKB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: li a2, 127
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-ZBKB-LABEL: bcmp_size_127:
+; CHECK-UNALIGNED-RV64-ZBKB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: li a2, 127
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_size_127:
+; CHECK-UNALIGNED-RV32-V: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-V-NEXT: addi sp, sp, -96
+; CHECK-UNALIGNED-RV32-V-NEXT: sw ra, 92(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s0, 88(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s1, 84(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s2, 80(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s3, 76(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s4, 72(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s5, 68(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s6, 64(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s7, 60(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s8, 56(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s9, 52(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s10, 48(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s11, 44(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a5, 32(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t5, 36(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t4, 40(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a6, 44(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t2, 0(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t1, 4(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s0, 8(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a4, 12(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t3, 48(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t0, 52(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s2, 56(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a3, 60(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s1, 16(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a7, 20(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t6, 24(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a2, 28(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s4, 12(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s5, 60(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s6, 16(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s7, 20(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s8, 24(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s9, 28(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s3, 32(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s10, 36(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s11, 40(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw ra, 44(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a2, a2, s9
+; CHECK-UNALIGNED-RV32-V-NEXT: sw a2, 40(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a2, a3, s5
+; CHECK-UNALIGNED-RV32-V-NEXT: sw a2, 36(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a2, a4, s4
+; CHECK-UNALIGNED-RV32-V-NEXT: sw a2, 32(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s4, 56(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s5, 48(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s9, 52(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a2, a6, ra
+; CHECK-UNALIGNED-RV32-V-NEXT: sw a2, 28(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: lw ra, 4(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a2, a7, s7
+; CHECK-UNALIGNED-RV32-V-NEXT: sw a2, 24(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a2, t0, s9
+; CHECK-UNALIGNED-RV32-V-NEXT: sw a2, 20(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s7, 0(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s9, 8(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a2, t1, ra
+; CHECK-UNALIGNED-RV32-V-NEXT: sw a2, 16(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: lw ra, 107(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a2, t5, s10
+; CHECK-UNALIGNED-RV32-V-NEXT: sw a2, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s10, 75(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor t6, t6, s8
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s8, 123(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor s2, s2, s4
+; CHECK-UNALIGNED-RV32-V-NEXT: xor s0, s0, s9
+; CHECK-UNALIGNED-RV32-V-NEXT: xor t5, t4, s11
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s4, 83(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s9, 87(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s11, 91(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor s1, s1, s6
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s6, 107(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor t4, t3, s5
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s5, 91(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor t3, t2, s7
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s7, 123(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor t2, a5, s3
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s3, 75(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor s5, s11, s5
+; CHECK-UNALIGNED-RV32-V-NEXT: xor s7, s8, s7
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s8, 87(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s11, 83(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor s3, s10, s3
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s10, 115(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor s6, ra, s6
+; CHECK-UNALIGNED-RV32-V-NEXT: lw ra, 115(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor s4, s4, s11
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s11, 119(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a7, 119(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor s10, s10, ra
+; CHECK-UNALIGNED-RV32-V-NEXT: lw ra, 71(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a5, 67(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a2, 67(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a6, 71(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a4, 99(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a3, 99(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor t1, a5, a2
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a5, 103(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a2, 103(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor t0, a4, a3
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a4, s9, s8
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a7, s11, a7
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a6, ra, a6
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a3, a5, a2
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a5, 95(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s8, 63(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s9, 111(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a2, 79(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s11, 79(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw ra, 111(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a0, 63(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a1, 95(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a2, a2, s11
+; CHECK-UNALIGNED-RV32-V-NEXT: xor s9, s9, ra
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a0, s8, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a1, a5, a1
+; CHECK-UNALIGNED-RV32-V-NEXT: or a1, t2, a1
+; CHECK-UNALIGNED-RV32-V-NEXT: or a0, t3, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: or a5, t4, s9
+; CHECK-UNALIGNED-RV32-V-NEXT: or a2, s1, a2
+; CHECK-UNALIGNED-RV32-V-NEXT: or a3, t5, a3
+; CHECK-UNALIGNED-RV32-V-NEXT: or a6, s0, a6
+; CHECK-UNALIGNED-RV32-V-NEXT: or a7, s2, a7
+; CHECK-UNALIGNED-RV32-V-NEXT: or a4, t6, a4
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t2, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: or t0, t2, t0
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t2, 16(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: or t1, t2, t1
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t2, 20(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: or t2, t2, s10
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t3, 24(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: or t3, t3, s4
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t4, 28(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: or t4, t4, s6
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t5, 32(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: or t5, t5, s3
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t6, 36(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: or t6, t6, s7
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: or s0, s0, s5
+; CHECK-UNALIGNED-RV32-V-NEXT: or t6, s0, t6
+; CHECK-UNALIGNED-RV32-V-NEXT: or t4, t5, t4
+; CHECK-UNALIGNED-RV32-V-NEXT: or t2, t3, t2
+; CHECK-UNALIGNED-RV32-V-NEXT: or t0, t1, t0
+; CHECK-UNALIGNED-RV32-V-NEXT: or a4, a4, a7
+; CHECK-UNALIGNED-RV32-V-NEXT: or a3, a6, a3
+; CHECK-UNALIGNED-RV32-V-NEXT: or a2, a2, a5
+; CHECK-UNALIGNED-RV32-V-NEXT: or a0, a0, a1
+; CHECK-UNALIGNED-RV32-V-NEXT: or a1, t4, t6
+; CHECK-UNALIGNED-RV32-V-NEXT: or a5, t0, t2
+; CHECK-UNALIGNED-RV32-V-NEXT: or a3, a3, a4
+; CHECK-UNALIGNED-RV32-V-NEXT: or a0, a0, a2
+; CHECK-UNALIGNED-RV32-V-NEXT: or a1, a5, a1
+; CHECK-UNALIGNED-RV32-V-NEXT: or a0, a0, a3
+; CHECK-UNALIGNED-RV32-V-NEXT: or a0, a0, a1
+; CHECK-UNALIGNED-RV32-V-NEXT: snez a0, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: lw ra, 92(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s0, 88(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s1, 84(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s2, 80(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s3, 76(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s4, 72(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s5, 68(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s6, 64(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s7, 60(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s8, 56(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s9, 52(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s10, 48(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s11, 44(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: addi sp, sp, 96
+; CHECK-UNALIGNED-RV32-V-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_size_127:
+; CHECK-UNALIGNED-RV64-V: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-V-NEXT: addi sp, sp, -96
+; CHECK-UNALIGNED-RV64-V-NEXT: sd s0, 88(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-V-NEXT: sd s1, 80(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-V-NEXT: sd s2, 72(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-V-NEXT: sd s3, 64(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-V-NEXT: sd s4, 56(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-V-NEXT: sd s5, 48(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-V-NEXT: sd s6, 40(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-V-NEXT: sd s7, 32(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-V-NEXT: sd s8, 24(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-V-NEXT: sd s9, 16(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-V-NEXT: sd s10, 8(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-V-NEXT: ld a2, 32(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld a3, 40(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld a4, 48(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld a5, 56(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld a6, 0(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld a7, 8(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld t0, 16(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld t1, 24(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld t2, 32(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld t3, 40(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld t4, 48(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld t5, 56(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld t6, 0(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s0, 8(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s1, 16(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s2, 24(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s3, 95(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s4, 103(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s5, 111(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s6, 119(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s7, 63(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s8, 71(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s9, 79(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld a0, 87(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: xor t1, t1, s2
+; CHECK-UNALIGNED-RV64-V-NEXT: xor a5, a5, t5
+; CHECK-UNALIGNED-RV64-V-NEXT: xor a7, a7, s0
+; CHECK-UNALIGNED-RV64-V-NEXT: ld t5, 63(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s0, 71(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s2, 79(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s10, 87(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: xor a3, a3, t3
+; CHECK-UNALIGNED-RV64-V-NEXT: xor t0, t0, s1
+; CHECK-UNALIGNED-RV64-V-NEXT: xor a4, a4, t4
+; CHECK-UNALIGNED-RV64-V-NEXT: ld t3, 95(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld t4, 103(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s1, 111(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld a1, 119(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: xor a6, a6, t6
+; CHECK-UNALIGNED-RV64-V-NEXT: xor a2, a2, t2
+; CHECK-UNALIGNED-RV64-V-NEXT: xor a0, a0, s10
+; CHECK-UNALIGNED-RV64-V-NEXT: xor a1, s6, a1
+; CHECK-UNALIGNED-RV64-V-NEXT: xor t2, s8, s0
+; CHECK-UNALIGNED-RV64-V-NEXT: xor t4, s4, t4
+; CHECK-UNALIGNED-RV64-V-NEXT: xor t6, s9, s2
+; CHECK-UNALIGNED-RV64-V-NEXT: xor s0, s5, s1
+; CHECK-UNALIGNED-RV64-V-NEXT: xor t5, s7, t5
+; CHECK-UNALIGNED-RV64-V-NEXT: xor t3, s3, t3
+; CHECK-UNALIGNED-RV64-V-NEXT: or a2, a2, t3
+; CHECK-UNALIGNED-RV64-V-NEXT: or a6, a6, t5
+; CHECK-UNALIGNED-RV64-V-NEXT: or a4, a4, s0
+; CHECK-UNALIGNED-RV64-V-NEXT: or t0, t0, t6
+; CHECK-UNALIGNED-RV64-V-NEXT: or a3, a3, t4
+; CHECK-UNALIGNED-RV64-V-NEXT: or a7, a7, t2
+; CHECK-UNALIGNED-RV64-V-NEXT: or a1, a5, a1
+; CHECK-UNALIGNED-RV64-V-NEXT: or a0, t1, a0
+; CHECK-UNALIGNED-RV64-V-NEXT: or a0, a0, a1
+; CHECK-UNALIGNED-RV64-V-NEXT: or a1, a7, a3
+; CHECK-UNALIGNED-RV64-V-NEXT: or a3, t0, a4
+; CHECK-UNALIGNED-RV64-V-NEXT: or a2, a6, a2
+; CHECK-UNALIGNED-RV64-V-NEXT: or a0, a1, a0
+; CHECK-UNALIGNED-RV64-V-NEXT: or a2, a2, a3
+; CHECK-UNALIGNED-RV64-V-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV64-V-NEXT: snez a0, a0
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s0, 88(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s1, 80(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s2, 72(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s3, 64(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s4, 56(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s5, 48(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s6, 40(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s7, 32(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s8, 24(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s9, 16(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s10, 8(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-V-NEXT: addi sp, sp, 96
+; CHECK-UNALIGNED-RV64-V-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 127)
+ ret i32 %bcmp
+}
+
+define i32 @bcmp_size_128(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-ALIGNED-RV32-LABEL: bcmp_size_128:
+; CHECK-ALIGNED-RV32: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-NEXT: li a2, 128
+; CHECK-ALIGNED-RV32-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-NEXT: ret
+;
+; CHECK-ALIGNED-RV64-LABEL: bcmp_size_128:
+; CHECK-ALIGNED-RV64: # %bb.0: # %entry
+; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-ALIGNED-RV64-NEXT: li a2, 128
+; CHECK-ALIGNED-RV64-NEXT: call bcmp
+; CHECK-ALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-NEXT: ret
+;
+; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_size_128:
+; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 128
+; CHECK-ALIGNED-RV32-ZBB-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
+;
+; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_size_128:
+; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 128
+; CHECK-ALIGNED-RV64-ZBB-NEXT: call bcmp
+; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
+;
+; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_size_128:
+; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 128
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
+;
+; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_size_128:
+; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 128
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: call bcmp
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
+;
+; CHECK-ALIGNED-RV32-V-LABEL: bcmp_size_128:
+; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-V-NEXT: li a2, 128
+; CHECK-ALIGNED-RV32-V-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-V-NEXT: ret
+;
+; CHECK-ALIGNED-RV64-V-LABEL: bcmp_size_128:
+; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
+; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV64-V-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-ALIGNED-RV64-V-NEXT: li a2, 128
+; CHECK-ALIGNED-RV64-V-NEXT: call bcmp
+; CHECK-ALIGNED-RV64-V-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-V-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-LABEL: bcmp_size_128:
+; CHECK-UNALIGNED-RV32: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-NEXT: li a2, 128
+; CHECK-UNALIGNED-RV32-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-LABEL: bcmp_size_128:
+; CHECK-UNALIGNED-RV64: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-NEXT: li a2, 128
+; CHECK-UNALIGNED-RV64-NEXT: call bcmp
+; CHECK-UNALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV64-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-ZBB-LABEL: bcmp_size_128:
+; CHECK-UNALIGNED-RV32-ZBB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: li a2, 128
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-ZBB-LABEL: bcmp_size_128:
+; CHECK-UNALIGNED-RV64-ZBB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: li a2, 128
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-ZBKB-LABEL: bcmp_size_128:
+; CHECK-UNALIGNED-RV32-ZBKB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: li a2, 128
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-ZBKB-LABEL: bcmp_size_128:
+; CHECK-UNALIGNED-RV64-ZBKB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: li a2, 128
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_size_128:
+; CHECK-UNALIGNED-RV32-V: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-V-NEXT: li a2, 128
+; CHECK-UNALIGNED-RV32-V-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v8, (a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v16, (a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: vmsne.vv v24, v8, v16
+; CHECK-UNALIGNED-RV32-V-NEXT: vcpop.m a0, v24
+; CHECK-UNALIGNED-RV32-V-NEXT: snez a0, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_size_128:
+; CHECK-UNALIGNED-RV64-V: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-V-NEXT: li a2, 128
+; CHECK-UNALIGNED-RV64-V-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v8, (a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v16, (a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: vmsne.vv v24, v8, v16
+; CHECK-UNALIGNED-RV64-V-NEXT: vcpop.m a0, v24
+; CHECK-UNALIGNED-RV64-V-NEXT: snez a0, a0
+; CHECK-UNALIGNED-RV64-V-NEXT: ret
entry:
%bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 128)
ret i32 %bcmp
diff --git a/llvm/test/CodeGen/RISCV/memcmp.ll b/llvm/test/CodeGen/RISCV/memcmp.ll
index df9d781a4536d..f9a6dbba04fc6 100644
--- a/llvm/test/CodeGen/RISCV/memcmp.ll
+++ b/llvm/test/CodeGen/RISCV/memcmp.ll
@@ -870,13 +870,11 @@ define i32 @bcmp_size_8(ptr %s1, ptr %s2) nounwind {
;
; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_size_8:
; CHECK-UNALIGNED-RV32-V: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a0, 4(a0)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a3, 0(a1)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a1, 4(a1)
-; CHECK-UNALIGNED-RV32-V-NEXT: xor a2, a2, a3
-; CHECK-UNALIGNED-RV32-V-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV32-V-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
+; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v8, (a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v9, (a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: vmsne.vv v8, v8, v9
+; CHECK-UNALIGNED-RV32-V-NEXT: vcpop.m a0, v8
; CHECK-UNALIGNED-RV32-V-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV32-V-NEXT: ret
;
@@ -1073,18 +1071,18 @@ define i32 @bcmp_size_15(ptr %s1, ptr %s2) nounwind {
; CHECK-UNALIGNED-RV32-V: # %bb.0: # %entry
; CHECK-UNALIGNED-RV32-V-NEXT: lw a2, 0(a0)
; CHECK-UNALIGNED-RV32-V-NEXT: lw a3, 4(a0)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a4, 8(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a4, 7(a0)
; CHECK-UNALIGNED-RV32-V-NEXT: lw a0, 11(a0)
; CHECK-UNALIGNED-RV32-V-NEXT: lw a5, 0(a1)
; CHECK-UNALIGNED-RV32-V-NEXT: lw a6, 4(a1)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a7, 8(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a7, 7(a1)
; CHECK-UNALIGNED-RV32-V-NEXT: lw a1, 11(a1)
; CHECK-UNALIGNED-RV32-V-NEXT: xor a2, a2, a5
; CHECK-UNALIGNED-RV32-V-NEXT: xor a3, a3, a6
; CHECK-UNALIGNED-RV32-V-NEXT: xor a4, a4, a7
; CHECK-UNALIGNED-RV32-V-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV32-V-NEXT: or a2, a2, a3
-; CHECK-UNALIGNED-RV32-V-NEXT: or a0, a4, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: or a0, a3, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: or a2, a2, a4
; CHECK-UNALIGNED-RV32-V-NEXT: or a0, a2, a0
; CHECK-UNALIGNED-RV32-V-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV32-V-NEXT: ret
@@ -1284,33 +1282,21 @@ define i32 @bcmp_size_16(ptr %s1, ptr %s2) nounwind {
;
; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_size_16:
; CHECK-UNALIGNED-RV32-V: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a3, 4(a0)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a4, 8(a0)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a0, 12(a0)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a5, 0(a1)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a6, 4(a1)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a7, 8(a1)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a1, 12(a1)
-; CHECK-UNALIGNED-RV32-V-NEXT: xor a2, a2, a5
-; CHECK-UNALIGNED-RV32-V-NEXT: xor a3, a3, a6
-; CHECK-UNALIGNED-RV32-V-NEXT: xor a4, a4, a7
-; CHECK-UNALIGNED-RV32-V-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV32-V-NEXT: or a2, a2, a3
-; CHECK-UNALIGNED-RV32-V-NEXT: or a0, a4, a0
-; CHECK-UNALIGNED-RV32-V-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: vsetivli zero, 16, e8, m1, ta, ma
+; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v8, (a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v9, (a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: vmsne.vv v8, v8, v9
+; CHECK-UNALIGNED-RV32-V-NEXT: vcpop.m a0, v8
; CHECK-UNALIGNED-RV32-V-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV32-V-NEXT: ret
;
; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_size_16:
; CHECK-UNALIGNED-RV64-V: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a2, 0(a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a0, 8(a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a3, 0(a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a1, 8(a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: xor a2, a2, a3
-; CHECK-UNALIGNED-RV64-V-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV64-V-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV64-V-NEXT: vsetivli zero, 16, e8, m1, ta, ma
+; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v8, (a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v9, (a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: vmsne.vv v8, v8, v9
+; CHECK-UNALIGNED-RV64-V-NEXT: vcpop.m a0, v8
; CHECK-UNALIGNED-RV64-V-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-V-NEXT: ret
entry:
@@ -1577,29 +1563,29 @@ define i32 @bcmp_size_31(ptr %s1, ptr %s2) nounwind {
; CHECK-UNALIGNED-RV32-V-NEXT: lw a7, 4(a1)
; CHECK-UNALIGNED-RV32-V-NEXT: lw t0, 8(a1)
; CHECK-UNALIGNED-RV32-V-NEXT: lw t1, 12(a1)
-; CHECK-UNALIGNED-RV32-V-NEXT: xor a2, a2, a6
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a6, 16(a0)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw t2, 20(a0)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw t3, 24(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t2, 15(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t3, 19(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t4, 23(a0)
; CHECK-UNALIGNED-RV32-V-NEXT: lw a0, 27(a0)
; CHECK-UNALIGNED-RV32-V-NEXT: xor a3, a3, a7
-; CHECK-UNALIGNED-RV32-V-NEXT: xor a4, a4, t0
; CHECK-UNALIGNED-RV32-V-NEXT: xor a5, a5, t1
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a7, 16(a1)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw t0, 20(a1)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw t1, 24(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a7, 15(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t1, 19(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t5, 23(a1)
; CHECK-UNALIGNED-RV32-V-NEXT: lw a1, 27(a1)
-; CHECK-UNALIGNED-RV32-V-NEXT: xor a6, a6, a7
-; CHECK-UNALIGNED-RV32-V-NEXT: xor a7, t2, t0
-; CHECK-UNALIGNED-RV32-V-NEXT: xor t0, t3, t1
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a2, a2, a6
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a4, a4, t0
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a6, t3, t1
; CHECK-UNALIGNED-RV32-V-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV32-V-NEXT: or a2, a2, a3
-; CHECK-UNALIGNED-RV32-V-NEXT: or a4, a4, a5
-; CHECK-UNALIGNED-RV32-V-NEXT: or a1, a6, a7
-; CHECK-UNALIGNED-RV32-V-NEXT: or a0, t0, a0
-; CHECK-UNALIGNED-RV32-V-NEXT: or a2, a2, a4
-; CHECK-UNALIGNED-RV32-V-NEXT: or a0, a1, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a1, t2, a7
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a7, t4, t5
+; CHECK-UNALIGNED-RV32-V-NEXT: or a4, a4, a7
+; CHECK-UNALIGNED-RV32-V-NEXT: or a1, a2, a1
+; CHECK-UNALIGNED-RV32-V-NEXT: or a0, a5, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: or a2, a3, a6
; CHECK-UNALIGNED-RV32-V-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: or a1, a1, a4
+; CHECK-UNALIGNED-RV32-V-NEXT: or a0, a1, a0
; CHECK-UNALIGNED-RV32-V-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV32-V-NEXT: ret
;
@@ -1607,18 +1593,18 @@ define i32 @bcmp_size_31(ptr %s1, ptr %s2) nounwind {
; CHECK-UNALIGNED-RV64-V: # %bb.0: # %entry
; CHECK-UNALIGNED-RV64-V-NEXT: ld a2, 0(a0)
; CHECK-UNALIGNED-RV64-V-NEXT: ld a3, 8(a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a4, 16(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld a4, 15(a0)
; CHECK-UNALIGNED-RV64-V-NEXT: ld a0, 23(a0)
; CHECK-UNALIGNED-RV64-V-NEXT: ld a5, 0(a1)
; CHECK-UNALIGNED-RV64-V-NEXT: ld a6, 8(a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a7, 16(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld a7, 15(a1)
; CHECK-UNALIGNED-RV64-V-NEXT: ld a1, 23(a1)
; CHECK-UNALIGNED-RV64-V-NEXT: xor a2, a2, a5
; CHECK-UNALIGNED-RV64-V-NEXT: xor a3, a3, a6
; CHECK-UNALIGNED-RV64-V-NEXT: xor a4, a4, a7
; CHECK-UNALIGNED-RV64-V-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV64-V-NEXT: or a2, a2, a3
-; CHECK-UNALIGNED-RV64-V-NEXT: or a0, a4, a0
+; CHECK-UNALIGNED-RV64-V-NEXT: or a0, a3, a0
+; CHECK-UNALIGNED-RV64-V-NEXT: or a2, a2, a4
; CHECK-UNALIGNED-RV64-V-NEXT: or a0, a2, a0
; CHECK-UNALIGNED-RV64-V-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-V-NEXT: ret
@@ -1878,57 +1864,23 @@ define i32 @bcmp_size_32(ptr %s1, ptr %s2) nounwind {
;
; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_size_32:
; CHECK-UNALIGNED-RV32-V: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a3, 4(a0)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a4, 8(a0)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a5, 12(a0)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a6, 0(a1)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a7, 4(a1)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw t0, 8(a1)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw t1, 12(a1)
-; CHECK-UNALIGNED-RV32-V-NEXT: xor a2, a2, a6
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a6, 16(a0)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw t2, 20(a0)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw t3, 24(a0)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a0, 28(a0)
-; CHECK-UNALIGNED-RV32-V-NEXT: xor a3, a3, a7
-; CHECK-UNALIGNED-RV32-V-NEXT: xor a4, a4, t0
-; CHECK-UNALIGNED-RV32-V-NEXT: xor a5, a5, t1
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a7, 16(a1)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw t0, 20(a1)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw t1, 24(a1)
-; CHECK-UNALIGNED-RV32-V-NEXT: lw a1, 28(a1)
-; CHECK-UNALIGNED-RV32-V-NEXT: xor a6, a6, a7
-; CHECK-UNALIGNED-RV32-V-NEXT: xor a7, t2, t0
-; CHECK-UNALIGNED-RV32-V-NEXT: xor t0, t3, t1
-; CHECK-UNALIGNED-RV32-V-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV32-V-NEXT: or a2, a2, a3
-; CHECK-UNALIGNED-RV32-V-NEXT: or a4, a4, a5
-; CHECK-UNALIGNED-RV32-V-NEXT: or a1, a6, a7
-; CHECK-UNALIGNED-RV32-V-NEXT: or a0, t0, a0
-; CHECK-UNALIGNED-RV32-V-NEXT: or a2, a2, a4
-; CHECK-UNALIGNED-RV32-V-NEXT: or a0, a1, a0
-; CHECK-UNALIGNED-RV32-V-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: li a2, 32
+; CHECK-UNALIGNED-RV32-V-NEXT: vsetvli zero, a2, e8, m2, ta, ma
+; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v8, (a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v10, (a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: vmsne.vv v12, v8, v10
+; CHECK-UNALIGNED-RV32-V-NEXT: vcpop.m a0, v12
; CHECK-UNALIGNED-RV32-V-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV32-V-NEXT: ret
;
; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_size_32:
; CHECK-UNALIGNED-RV64-V: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a2, 0(a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a3, 8(a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a4, 16(a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a0, 24(a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a5, 0(a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a6, 8(a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a7, 16(a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a1, 24(a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: xor a2, a2, a5
-; CHECK-UNALIGNED-RV64-V-NEXT: xor a3, a3, a6
-; CHECK-UNALIGNED-RV64-V-NEXT: xor a4, a4, a7
-; CHECK-UNALIGNED-RV64-V-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV64-V-NEXT: or a2, a2, a3
-; CHECK-UNALIGNED-RV64-V-NEXT: or a0, a4, a0
-; CHECK-UNALIGNED-RV64-V-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV64-V-NEXT: li a2, 32
+; CHECK-UNALIGNED-RV64-V-NEXT: vsetvli zero, a2, e8, m2, ta, ma
+; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v8, (a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v10, (a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: vmsne.vv v12, v8, v10
+; CHECK-UNALIGNED-RV64-V-NEXT: vcpop.m a0, v12
; CHECK-UNALIGNED-RV64-V-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-V-NEXT: ret
entry:
@@ -1937,15 +1889,15 @@ entry:
}
define i32 @bcmp_size_63(ptr %s1, ptr %s2) nounwind {
-; CHECK-RV32-LABEL: bcmp_size_63:
-; CHECK-RV32: # %bb.0: # %entry
-; CHECK-RV32-NEXT: addi sp, sp, -16
-; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-RV32-NEXT: li a2, 63
-; CHECK-RV32-NEXT: call bcmp
-; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-RV32-NEXT: addi sp, sp, 16
-; CHECK-RV32-NEXT: ret
+; CHECK-ALIGNED-RV32-LABEL: bcmp_size_63:
+; CHECK-ALIGNED-RV32: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-NEXT: li a2, 63
+; CHECK-ALIGNED-RV32-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-NEXT: ret
;
; CHECK-ALIGNED-RV64-LABEL: bcmp_size_63:
; CHECK-ALIGNED-RV64: # %bb.0: # %entry
@@ -1957,6 +1909,16 @@ define i32 @bcmp_size_63(ptr %s1, ptr %s2) nounwind {
; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-NEXT: ret
;
+; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_size_63:
+; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 63
+; CHECK-ALIGNED-RV32-ZBB-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
+;
; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_size_63:
; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
@@ -1967,6 +1929,16 @@ define i32 @bcmp_size_63(ptr %s1, ptr %s2) nounwind {
; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
;
+; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_size_63:
+; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 63
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
+;
; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_size_63:
; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
@@ -1977,6 +1949,16 @@ define i32 @bcmp_size_63(ptr %s1, ptr %s2) nounwind {
; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
;
+; CHECK-ALIGNED-RV32-V-LABEL: bcmp_size_63:
+; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-V-NEXT: li a2, 63
+; CHECK-ALIGNED-RV32-V-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-V-NEXT: ret
+;
; CHECK-ALIGNED-RV64-V-LABEL: bcmp_size_63:
; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
@@ -1987,6 +1969,16 @@ define i32 @bcmp_size_63(ptr %s1, ptr %s2) nounwind {
; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-V-NEXT: ret
;
+; CHECK-UNALIGNED-RV32-LABEL: bcmp_size_63:
+; CHECK-UNALIGNED-RV32: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-NEXT: li a2, 63
+; CHECK-UNALIGNED-RV32-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-NEXT: ret
+;
; CHECK-UNALIGNED-RV64-LABEL: bcmp_size_63:
; CHECK-UNALIGNED-RV64: # %bb.0: # %entry
; CHECK-UNALIGNED-RV64-NEXT: ld a2, 0(a0)
@@ -2023,6 +2015,16 @@ define i32 @bcmp_size_63(ptr %s1, ptr %s2) nounwind {
; CHECK-UNALIGNED-RV64-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-NEXT: ret
;
+; CHECK-UNALIGNED-RV32-ZBB-LABEL: bcmp_size_63:
+; CHECK-UNALIGNED-RV32-ZBB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: li a2, 63
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: ret
+;
; CHECK-UNALIGNED-RV64-ZBB-LABEL: bcmp_size_63:
; CHECK-UNALIGNED-RV64-ZBB: # %bb.0: # %entry
; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a2, 0(a0)
@@ -2059,6 +2061,16 @@ define i32 @bcmp_size_63(ptr %s1, ptr %s2) nounwind {
; CHECK-UNALIGNED-RV64-ZBB-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-ZBB-NEXT: ret
;
+; CHECK-UNALIGNED-RV32-ZBKB-LABEL: bcmp_size_63:
+; CHECK-UNALIGNED-RV32-ZBKB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: li a2, 63
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: ret
+;
; CHECK-UNALIGNED-RV64-ZBKB-LABEL: bcmp_size_63:
; CHECK-UNALIGNED-RV64-ZBKB: # %bb.0: # %entry
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a2, 0(a0)
@@ -2095,6 +2107,98 @@ define i32 @bcmp_size_63(ptr %s1, ptr %s2) nounwind {
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ret
;
+; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_size_63:
+; CHECK-UNALIGNED-RV32-V: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-V-NEXT: addi sp, sp, -48
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s0, 44(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s1, 40(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s2, 36(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s3, 32(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s4, 28(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s5, 24(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s6, 20(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s7, 16(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s8, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s9, 8(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s10, 4(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a2, 16(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a3, 20(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a4, 24(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a5, 28(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a6, 0(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a7, 4(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t0, 8(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t1, 12(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t2, 16(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t3, 20(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t4, 24(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t5, 28(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t6, 0(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s0, 4(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s1, 8(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s2, 12(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s3, 47(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s4, 51(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s5, 55(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s6, 59(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s7, 31(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s8, 35(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s9, 39(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a0, 43(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor t1, t1, s2
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a5, a5, t5
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a7, a7, s0
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t5, 31(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s0, 35(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s2, 39(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s10, 43(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a3, a3, t3
+; CHECK-UNALIGNED-RV32-V-NEXT: xor t0, t0, s1
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a4, a4, t4
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t3, 47(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t4, 51(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s1, 55(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a1, 59(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a6, a6, t6
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a2, a2, t2
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a0, a0, s10
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a1, s6, a1
+; CHECK-UNALIGNED-RV32-V-NEXT: xor t2, s8, s0
+; CHECK-UNALIGNED-RV32-V-NEXT: xor t4, s4, t4
+; CHECK-UNALIGNED-RV32-V-NEXT: xor t6, s9, s2
+; CHECK-UNALIGNED-RV32-V-NEXT: xor s0, s5, s1
+; CHECK-UNALIGNED-RV32-V-NEXT: xor t5, s7, t5
+; CHECK-UNALIGNED-RV32-V-NEXT: xor t3, s3, t3
+; CHECK-UNALIGNED-RV32-V-NEXT: or a2, a2, t3
+; CHECK-UNALIGNED-RV32-V-NEXT: or a6, a6, t5
+; CHECK-UNALIGNED-RV32-V-NEXT: or a4, a4, s0
+; CHECK-UNALIGNED-RV32-V-NEXT: or t0, t0, t6
+; CHECK-UNALIGNED-RV32-V-NEXT: or a3, a3, t4
+; CHECK-UNALIGNED-RV32-V-NEXT: or a7, a7, t2
+; CHECK-UNALIGNED-RV32-V-NEXT: or a1, a5, a1
+; CHECK-UNALIGNED-RV32-V-NEXT: or a0, t1, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: or a0, a0, a1
+; CHECK-UNALIGNED-RV32-V-NEXT: or a1, a7, a3
+; CHECK-UNALIGNED-RV32-V-NEXT: or a3, t0, a4
+; CHECK-UNALIGNED-RV32-V-NEXT: or a2, a6, a2
+; CHECK-UNALIGNED-RV32-V-NEXT: or a0, a1, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: or a2, a2, a3
+; CHECK-UNALIGNED-RV32-V-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: snez a0, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s0, 44(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s1, 40(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s2, 36(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s3, 32(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s4, 28(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s5, 24(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s6, 20(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s7, 16(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s8, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s9, 8(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s10, 4(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: addi sp, sp, 48
+; CHECK-UNALIGNED-RV32-V-NEXT: ret
+;
; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_size_63:
; CHECK-UNALIGNED-RV64-V: # %bb.0: # %entry
; CHECK-UNALIGNED-RV64-V-NEXT: ld a2, 0(a0)
@@ -2105,29 +2209,29 @@ define i32 @bcmp_size_63(ptr %s1, ptr %s2) nounwind {
; CHECK-UNALIGNED-RV64-V-NEXT: ld a7, 8(a1)
; CHECK-UNALIGNED-RV64-V-NEXT: ld t0, 16(a1)
; CHECK-UNALIGNED-RV64-V-NEXT: ld t1, 24(a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: xor a2, a2, a6
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a6, 32(a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld t2, 40(a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld t3, 48(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld t2, 31(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld t3, 39(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld t4, 47(a0)
; CHECK-UNALIGNED-RV64-V-NEXT: ld a0, 55(a0)
; CHECK-UNALIGNED-RV64-V-NEXT: xor a3, a3, a7
-; CHECK-UNALIGNED-RV64-V-NEXT: xor a4, a4, t0
; CHECK-UNALIGNED-RV64-V-NEXT: xor a5, a5, t1
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a7, 32(a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld t0, 40(a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld t1, 48(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld a7, 31(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld t1, 39(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld t5, 47(a1)
; CHECK-UNALIGNED-RV64-V-NEXT: ld a1, 55(a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: xor a6, a6, a7
-; CHECK-UNALIGNED-RV64-V-NEXT: xor a7, t2, t0
-; CHECK-UNALIGNED-RV64-V-NEXT: xor t0, t3, t1
+; CHECK-UNALIGNED-RV64-V-NEXT: xor a2, a2, a6
+; CHECK-UNALIGNED-RV64-V-NEXT: xor a4, a4, t0
+; CHECK-UNALIGNED-RV64-V-NEXT: xor a6, t3, t1
; CHECK-UNALIGNED-RV64-V-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV64-V-NEXT: or a2, a2, a3
-; CHECK-UNALIGNED-RV64-V-NEXT: or a4, a4, a5
-; CHECK-UNALIGNED-RV64-V-NEXT: or a1, a6, a7
-; CHECK-UNALIGNED-RV64-V-NEXT: or a0, t0, a0
-; CHECK-UNALIGNED-RV64-V-NEXT: or a2, a2, a4
-; CHECK-UNALIGNED-RV64-V-NEXT: or a0, a1, a0
+; CHECK-UNALIGNED-RV64-V-NEXT: xor a1, t2, a7
+; CHECK-UNALIGNED-RV64-V-NEXT: xor a7, t4, t5
+; CHECK-UNALIGNED-RV64-V-NEXT: or a4, a4, a7
+; CHECK-UNALIGNED-RV64-V-NEXT: or a1, a2, a1
+; CHECK-UNALIGNED-RV64-V-NEXT: or a0, a5, a0
+; CHECK-UNALIGNED-RV64-V-NEXT: or a2, a3, a6
; CHECK-UNALIGNED-RV64-V-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV64-V-NEXT: or a1, a1, a4
+; CHECK-UNALIGNED-RV64-V-NEXT: or a0, a1, a0
; CHECK-UNALIGNED-RV64-V-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-V-NEXT: ret
entry:
@@ -2136,15 +2240,15 @@ entry:
}
define i32 @bcmp_size_64(ptr %s1, ptr %s2) nounwind {
-; CHECK-RV32-LABEL: bcmp_size_64:
-; CHECK-RV32: # %bb.0: # %entry
-; CHECK-RV32-NEXT: addi sp, sp, -16
-; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-RV32-NEXT: li a2, 64
-; CHECK-RV32-NEXT: call bcmp
-; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-RV32-NEXT: addi sp, sp, 16
-; CHECK-RV32-NEXT: ret
+; CHECK-ALIGNED-RV32-LABEL: bcmp_size_64:
+; CHECK-ALIGNED-RV32: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-NEXT: li a2, 64
+; CHECK-ALIGNED-RV32-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-NEXT: ret
;
; CHECK-ALIGNED-RV64-LABEL: bcmp_size_64:
; CHECK-ALIGNED-RV64: # %bb.0: # %entry
@@ -2156,6 +2260,16 @@ define i32 @bcmp_size_64(ptr %s1, ptr %s2) nounwind {
; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-NEXT: ret
;
+; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_size_64:
+; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 64
+; CHECK-ALIGNED-RV32-ZBB-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
+;
; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_size_64:
; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
@@ -2166,6 +2280,16 @@ define i32 @bcmp_size_64(ptr %s1, ptr %s2) nounwind {
; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
;
+; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_size_64:
+; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 64
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
+;
; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_size_64:
; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
@@ -2176,6 +2300,16 @@ define i32 @bcmp_size_64(ptr %s1, ptr %s2) nounwind {
; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
;
+; CHECK-ALIGNED-RV32-V-LABEL: bcmp_size_64:
+; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-V-NEXT: li a2, 64
+; CHECK-ALIGNED-RV32-V-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-V-NEXT: ret
+;
; CHECK-ALIGNED-RV64-V-LABEL: bcmp_size_64:
; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
@@ -2186,6 +2320,16 @@ define i32 @bcmp_size_64(ptr %s1, ptr %s2) nounwind {
; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-V-NEXT: ret
;
+; CHECK-UNALIGNED-RV32-LABEL: bcmp_size_64:
+; CHECK-UNALIGNED-RV32: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-NEXT: li a2, 64
+; CHECK-UNALIGNED-RV32-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-NEXT: ret
+;
; CHECK-UNALIGNED-RV64-LABEL: bcmp_size_64:
; CHECK-UNALIGNED-RV64: # %bb.0: # %entry
; CHECK-UNALIGNED-RV64-NEXT: ld a2, 0(a0)
@@ -2222,6 +2366,16 @@ define i32 @bcmp_size_64(ptr %s1, ptr %s2) nounwind {
; CHECK-UNALIGNED-RV64-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-NEXT: ret
;
+; CHECK-UNALIGNED-RV32-ZBB-LABEL: bcmp_size_64:
+; CHECK-UNALIGNED-RV32-ZBB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: li a2, 64
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: ret
+;
; CHECK-UNALIGNED-RV64-ZBB-LABEL: bcmp_size_64:
; CHECK-UNALIGNED-RV64-ZBB: # %bb.0: # %entry
; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a2, 0(a0)
@@ -2258,6 +2412,16 @@ define i32 @bcmp_size_64(ptr %s1, ptr %s2) nounwind {
; CHECK-UNALIGNED-RV64-ZBB-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-ZBB-NEXT: ret
;
+; CHECK-UNALIGNED-RV32-ZBKB-LABEL: bcmp_size_64:
+; CHECK-UNALIGNED-RV32-ZBKB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: li a2, 64
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: ret
+;
; CHECK-UNALIGNED-RV64-ZBKB-LABEL: bcmp_size_64:
; CHECK-UNALIGNED-RV64-ZBKB: # %bb.0: # %entry
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a2, 0(a0)
@@ -2294,39 +2458,25 @@ define i32 @bcmp_size_64(ptr %s1, ptr %s2) nounwind {
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ret
;
+; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_size_64:
+; CHECK-UNALIGNED-RV32-V: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-V-NEXT: li a2, 64
+; CHECK-UNALIGNED-RV32-V-NEXT: vsetvli zero, a2, e8, m4, ta, ma
+; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v8, (a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v12, (a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: vmsne.vv v16, v8, v12
+; CHECK-UNALIGNED-RV32-V-NEXT: vcpop.m a0, v16
+; CHECK-UNALIGNED-RV32-V-NEXT: snez a0, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: ret
+;
; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_size_64:
; CHECK-UNALIGNED-RV64-V: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a2, 0(a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a3, 8(a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a4, 16(a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a5, 24(a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a6, 0(a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a7, 8(a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld t0, 16(a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld t1, 24(a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: xor a2, a2, a6
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a6, 32(a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld t2, 40(a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld t3, 48(a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a0, 56(a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: xor a3, a3, a7
-; CHECK-UNALIGNED-RV64-V-NEXT: xor a4, a4, t0
-; CHECK-UNALIGNED-RV64-V-NEXT: xor a5, a5, t1
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a7, 32(a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld t0, 40(a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld t1, 48(a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a1, 56(a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: xor a6, a6, a7
-; CHECK-UNALIGNED-RV64-V-NEXT: xor a7, t2, t0
-; CHECK-UNALIGNED-RV64-V-NEXT: xor t0, t3, t1
-; CHECK-UNALIGNED-RV64-V-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV64-V-NEXT: or a2, a2, a3
-; CHECK-UNALIGNED-RV64-V-NEXT: or a4, a4, a5
-; CHECK-UNALIGNED-RV64-V-NEXT: or a1, a6, a7
-; CHECK-UNALIGNED-RV64-V-NEXT: or a0, t0, a0
-; CHECK-UNALIGNED-RV64-V-NEXT: or a2, a2, a4
-; CHECK-UNALIGNED-RV64-V-NEXT: or a0, a1, a0
-; CHECK-UNALIGNED-RV64-V-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV64-V-NEXT: li a2, 64
+; CHECK-UNALIGNED-RV64-V-NEXT: vsetvli zero, a2, e8, m4, ta, ma
+; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v8, (a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v12, (a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: vmsne.vv v16, v8, v12
+; CHECK-UNALIGNED-RV64-V-NEXT: vcpop.m a0, v16
; CHECK-UNALIGNED-RV64-V-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-V-NEXT: ret
entry:
@@ -2335,50 +2485,580 @@ entry:
}
define i32 @bcmp_size_127(ptr %s1, ptr %s2) nounwind {
-; CHECK-RV32-LABEL: bcmp_size_127:
-; CHECK-RV32: # %bb.0: # %entry
-; CHECK-RV32-NEXT: addi sp, sp, -16
-; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-RV32-NEXT: li a2, 127
-; CHECK-RV32-NEXT: call bcmp
-; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-RV32-NEXT: addi sp, sp, 16
-; CHECK-RV32-NEXT: ret
+; CHECK-ALIGNED-RV32-LABEL: bcmp_size_127:
+; CHECK-ALIGNED-RV32: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-NEXT: li a2, 127
+; CHECK-ALIGNED-RV32-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-NEXT: ret
;
-; CHECK-RV64-LABEL: bcmp_size_127:
-; CHECK-RV64: # %bb.0: # %entry
-; CHECK-RV64-NEXT: addi sp, sp, -16
-; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-RV64-NEXT: li a2, 127
-; CHECK-RV64-NEXT: call bcmp
-; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-RV64-NEXT: addi sp, sp, 16
-; CHECK-RV64-NEXT: ret
+; CHECK-ALIGNED-RV64-LABEL: bcmp_size_127:
+; CHECK-ALIGNED-RV64: # %bb.0: # %entry
+; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-ALIGNED-RV64-NEXT: li a2, 127
+; CHECK-ALIGNED-RV64-NEXT: call bcmp
+; CHECK-ALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-NEXT: ret
+;
+; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_size_127:
+; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 127
+; CHECK-ALIGNED-RV32-ZBB-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
+;
+; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_size_127:
+; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 127
+; CHECK-ALIGNED-RV64-ZBB-NEXT: call bcmp
+; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
+;
+; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_size_127:
+; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 127
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
+;
+; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_size_127:
+; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 127
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: call bcmp
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
+;
+; CHECK-ALIGNED-RV32-V-LABEL: bcmp_size_127:
+; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-V-NEXT: li a2, 127
+; CHECK-ALIGNED-RV32-V-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-V-NEXT: ret
+;
+; CHECK-ALIGNED-RV64-V-LABEL: bcmp_size_127:
+; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
+; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV64-V-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-ALIGNED-RV64-V-NEXT: li a2, 127
+; CHECK-ALIGNED-RV64-V-NEXT: call bcmp
+; CHECK-ALIGNED-RV64-V-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-V-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-LABEL: bcmp_size_127:
+; CHECK-UNALIGNED-RV32: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-NEXT: li a2, 127
+; CHECK-UNALIGNED-RV32-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-LABEL: bcmp_size_127:
+; CHECK-UNALIGNED-RV64: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-NEXT: li a2, 127
+; CHECK-UNALIGNED-RV64-NEXT: call bcmp
+; CHECK-UNALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV64-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-ZBB-LABEL: bcmp_size_127:
+; CHECK-UNALIGNED-RV32-ZBB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: li a2, 127
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-ZBB-LABEL: bcmp_size_127:
+; CHECK-UNALIGNED-RV64-ZBB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: li a2, 127
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-ZBKB-LABEL: bcmp_size_127:
+; CHECK-UNALIGNED-RV32-ZBKB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: li a2, 127
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-ZBKB-LABEL: bcmp_size_127:
+; CHECK-UNALIGNED-RV64-ZBKB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: li a2, 127
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_size_127:
+; CHECK-UNALIGNED-RV32-V: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-V-NEXT: addi sp, sp, -96
+; CHECK-UNALIGNED-RV32-V-NEXT: sw ra, 92(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s0, 88(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s1, 84(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s2, 80(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s3, 76(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s4, 72(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s5, 68(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s6, 64(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s7, 60(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s8, 56(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s9, 52(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s10, 48(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: sw s11, 44(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a5, 32(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t5, 36(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t4, 40(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a6, 44(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t2, 0(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t1, 4(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s0, 8(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a4, 12(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t3, 48(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t0, 52(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s2, 56(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a3, 60(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s1, 16(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a7, 20(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t6, 24(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a2, 28(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s4, 12(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s5, 60(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s6, 16(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s7, 20(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s8, 24(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s9, 28(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s3, 32(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s10, 36(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s11, 40(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw ra, 44(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a2, a2, s9
+; CHECK-UNALIGNED-RV32-V-NEXT: sw a2, 40(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a2, a3, s5
+; CHECK-UNALIGNED-RV32-V-NEXT: sw a2, 36(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a2, a4, s4
+; CHECK-UNALIGNED-RV32-V-NEXT: sw a2, 32(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s4, 56(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s5, 48(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s9, 52(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a2, a6, ra
+; CHECK-UNALIGNED-RV32-V-NEXT: sw a2, 28(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: lw ra, 4(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a2, a7, s7
+; CHECK-UNALIGNED-RV32-V-NEXT: sw a2, 24(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a2, t0, s9
+; CHECK-UNALIGNED-RV32-V-NEXT: sw a2, 20(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s7, 0(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s9, 8(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a2, t1, ra
+; CHECK-UNALIGNED-RV32-V-NEXT: sw a2, 16(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: lw ra, 107(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a2, t5, s10
+; CHECK-UNALIGNED-RV32-V-NEXT: sw a2, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s10, 75(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor t6, t6, s8
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s8, 123(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor s2, s2, s4
+; CHECK-UNALIGNED-RV32-V-NEXT: xor s0, s0, s9
+; CHECK-UNALIGNED-RV32-V-NEXT: xor t5, t4, s11
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s4, 83(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s9, 87(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s11, 91(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor s1, s1, s6
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s6, 107(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor t4, t3, s5
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s5, 91(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor t3, t2, s7
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s7, 123(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor t2, a5, s3
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s3, 75(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor s5, s11, s5
+; CHECK-UNALIGNED-RV32-V-NEXT: xor s7, s8, s7
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s8, 87(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s11, 83(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor s3, s10, s3
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s10, 115(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor s6, ra, s6
+; CHECK-UNALIGNED-RV32-V-NEXT: lw ra, 115(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor s4, s4, s11
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s11, 119(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a7, 119(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor s10, s10, ra
+; CHECK-UNALIGNED-RV32-V-NEXT: lw ra, 71(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a5, 67(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a2, 67(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a6, 71(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a4, 99(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a3, 99(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor t1, a5, a2
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a5, 103(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a2, 103(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor t0, a4, a3
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a4, s9, s8
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a7, s11, a7
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a6, ra, a6
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a3, a5, a2
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a5, 95(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s8, 63(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s9, 111(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a2, 79(a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s11, 79(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw ra, 111(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a0, 63(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: lw a1, 95(a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a2, a2, s11
+; CHECK-UNALIGNED-RV32-V-NEXT: xor s9, s9, ra
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a0, s8, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: xor a1, a5, a1
+; CHECK-UNALIGNED-RV32-V-NEXT: or a1, t2, a1
+; CHECK-UNALIGNED-RV32-V-NEXT: or a0, t3, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: or a5, t4, s9
+; CHECK-UNALIGNED-RV32-V-NEXT: or a2, s1, a2
+; CHECK-UNALIGNED-RV32-V-NEXT: or a3, t5, a3
+; CHECK-UNALIGNED-RV32-V-NEXT: or a6, s0, a6
+; CHECK-UNALIGNED-RV32-V-NEXT: or a7, s2, a7
+; CHECK-UNALIGNED-RV32-V-NEXT: or a4, t6, a4
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t2, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: or t0, t2, t0
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t2, 16(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: or t1, t2, t1
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t2, 20(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: or t2, t2, s10
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t3, 24(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: or t3, t3, s4
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t4, 28(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: or t4, t4, s6
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t5, 32(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: or t5, t5, s3
+; CHECK-UNALIGNED-RV32-V-NEXT: lw t6, 36(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: or t6, t6, s7
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: or s0, s0, s5
+; CHECK-UNALIGNED-RV32-V-NEXT: or t6, s0, t6
+; CHECK-UNALIGNED-RV32-V-NEXT: or t4, t5, t4
+; CHECK-UNALIGNED-RV32-V-NEXT: or t2, t3, t2
+; CHECK-UNALIGNED-RV32-V-NEXT: or t0, t1, t0
+; CHECK-UNALIGNED-RV32-V-NEXT: or a4, a4, a7
+; CHECK-UNALIGNED-RV32-V-NEXT: or a3, a6, a3
+; CHECK-UNALIGNED-RV32-V-NEXT: or a2, a2, a5
+; CHECK-UNALIGNED-RV32-V-NEXT: or a0, a0, a1
+; CHECK-UNALIGNED-RV32-V-NEXT: or a1, t4, t6
+; CHECK-UNALIGNED-RV32-V-NEXT: or a5, t0, t2
+; CHECK-UNALIGNED-RV32-V-NEXT: or a3, a3, a4
+; CHECK-UNALIGNED-RV32-V-NEXT: or a0, a0, a2
+; CHECK-UNALIGNED-RV32-V-NEXT: or a1, a5, a1
+; CHECK-UNALIGNED-RV32-V-NEXT: or a0, a0, a3
+; CHECK-UNALIGNED-RV32-V-NEXT: or a0, a0, a1
+; CHECK-UNALIGNED-RV32-V-NEXT: snez a0, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: lw ra, 92(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s0, 88(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s1, 84(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s2, 80(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s3, 76(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s4, 72(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s5, 68(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s6, 64(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s7, 60(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s8, 56(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s9, 52(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s10, 48(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: lw s11, 44(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-V-NEXT: addi sp, sp, 96
+; CHECK-UNALIGNED-RV32-V-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_size_127:
+; CHECK-UNALIGNED-RV64-V: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-V-NEXT: addi sp, sp, -96
+; CHECK-UNALIGNED-RV64-V-NEXT: sd s0, 88(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-V-NEXT: sd s1, 80(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-V-NEXT: sd s2, 72(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-V-NEXT: sd s3, 64(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-V-NEXT: sd s4, 56(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-V-NEXT: sd s5, 48(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-V-NEXT: sd s6, 40(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-V-NEXT: sd s7, 32(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-V-NEXT: sd s8, 24(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-V-NEXT: sd s9, 16(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-V-NEXT: sd s10, 8(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-V-NEXT: ld a2, 32(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld a3, 40(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld a4, 48(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld a5, 56(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld a6, 0(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld a7, 8(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld t0, 16(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld t1, 24(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld t2, 32(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld t3, 40(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld t4, 48(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld t5, 56(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld t6, 0(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s0, 8(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s1, 16(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s2, 24(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s3, 95(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s4, 103(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s5, 111(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s6, 119(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s7, 63(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s8, 71(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s9, 79(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld a0, 87(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: xor t1, t1, s2
+; CHECK-UNALIGNED-RV64-V-NEXT: xor a5, a5, t5
+; CHECK-UNALIGNED-RV64-V-NEXT: xor a7, a7, s0
+; CHECK-UNALIGNED-RV64-V-NEXT: ld t5, 63(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s0, 71(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s2, 79(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s10, 87(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: xor a3, a3, t3
+; CHECK-UNALIGNED-RV64-V-NEXT: xor t0, t0, s1
+; CHECK-UNALIGNED-RV64-V-NEXT: xor a4, a4, t4
+; CHECK-UNALIGNED-RV64-V-NEXT: ld t3, 95(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld t4, 103(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s1, 111(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld a1, 119(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: xor a6, a6, t6
+; CHECK-UNALIGNED-RV64-V-NEXT: xor a2, a2, t2
+; CHECK-UNALIGNED-RV64-V-NEXT: xor a0, a0, s10
+; CHECK-UNALIGNED-RV64-V-NEXT: xor a1, s6, a1
+; CHECK-UNALIGNED-RV64-V-NEXT: xor t2, s8, s0
+; CHECK-UNALIGNED-RV64-V-NEXT: xor t4, s4, t4
+; CHECK-UNALIGNED-RV64-V-NEXT: xor t6, s9, s2
+; CHECK-UNALIGNED-RV64-V-NEXT: xor s0, s5, s1
+; CHECK-UNALIGNED-RV64-V-NEXT: xor t5, s7, t5
+; CHECK-UNALIGNED-RV64-V-NEXT: xor t3, s3, t3
+; CHECK-UNALIGNED-RV64-V-NEXT: or a2, a2, t3
+; CHECK-UNALIGNED-RV64-V-NEXT: or a6, a6, t5
+; CHECK-UNALIGNED-RV64-V-NEXT: or a4, a4, s0
+; CHECK-UNALIGNED-RV64-V-NEXT: or t0, t0, t6
+; CHECK-UNALIGNED-RV64-V-NEXT: or a3, a3, t4
+; CHECK-UNALIGNED-RV64-V-NEXT: or a7, a7, t2
+; CHECK-UNALIGNED-RV64-V-NEXT: or a1, a5, a1
+; CHECK-UNALIGNED-RV64-V-NEXT: or a0, t1, a0
+; CHECK-UNALIGNED-RV64-V-NEXT: or a0, a0, a1
+; CHECK-UNALIGNED-RV64-V-NEXT: or a1, a7, a3
+; CHECK-UNALIGNED-RV64-V-NEXT: or a3, t0, a4
+; CHECK-UNALIGNED-RV64-V-NEXT: or a2, a6, a2
+; CHECK-UNALIGNED-RV64-V-NEXT: or a0, a1, a0
+; CHECK-UNALIGNED-RV64-V-NEXT: or a2, a2, a3
+; CHECK-UNALIGNED-RV64-V-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV64-V-NEXT: snez a0, a0
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s0, 88(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s1, 80(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s2, 72(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s3, 64(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s4, 56(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s5, 48(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s6, 40(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s7, 32(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s8, 24(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s9, 16(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-V-NEXT: ld s10, 8(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-V-NEXT: addi sp, sp, 96
+; CHECK-UNALIGNED-RV64-V-NEXT: ret
entry:
%bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 127)
ret i32 %bcmp
}
define i32 @bcmp_size_128(ptr %s1, ptr %s2) nounwind {
-; CHECK-RV32-LABEL: bcmp_size_128:
-; CHECK-RV32: # %bb.0: # %entry
-; CHECK-RV32-NEXT: addi sp, sp, -16
-; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-RV32-NEXT: li a2, 128
-; CHECK-RV32-NEXT: call bcmp
-; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-RV32-NEXT: addi sp, sp, 16
-; CHECK-RV32-NEXT: ret
+; CHECK-ALIGNED-RV32-LABEL: bcmp_size_128:
+; CHECK-ALIGNED-RV32: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-NEXT: li a2, 128
+; CHECK-ALIGNED-RV32-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-NEXT: ret
;
-; CHECK-RV64-LABEL: bcmp_size_128:
-; CHECK-RV64: # %bb.0: # %entry
-; CHECK-RV64-NEXT: addi sp, sp, -16
-; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-RV64-NEXT: li a2, 128
-; CHECK-RV64-NEXT: call bcmp
-; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-RV64-NEXT: addi sp, sp, 16
-; CHECK-RV64-NEXT: ret
+; CHECK-ALIGNED-RV64-LABEL: bcmp_size_128:
+; CHECK-ALIGNED-RV64: # %bb.0: # %entry
+; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-ALIGNED-RV64-NEXT: li a2, 128
+; CHECK-ALIGNED-RV64-NEXT: call bcmp
+; CHECK-ALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-NEXT: ret
+;
+; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_size_128:
+; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 128
+; CHECK-ALIGNED-RV32-ZBB-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
+;
+; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_size_128:
+; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 128
+; CHECK-ALIGNED-RV64-ZBB-NEXT: call bcmp
+; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
+;
+; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_size_128:
+; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 128
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
+;
+; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_size_128:
+; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 128
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: call bcmp
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
+;
+; CHECK-ALIGNED-RV32-V-LABEL: bcmp_size_128:
+; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-V-NEXT: li a2, 128
+; CHECK-ALIGNED-RV32-V-NEXT: call bcmp
+; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-V-NEXT: ret
+;
+; CHECK-ALIGNED-RV64-V-LABEL: bcmp_size_128:
+; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
+; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV64-V-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-ALIGNED-RV64-V-NEXT: li a2, 128
+; CHECK-ALIGNED-RV64-V-NEXT: call bcmp
+; CHECK-ALIGNED-RV64-V-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-V-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-LABEL: bcmp_size_128:
+; CHECK-UNALIGNED-RV32: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-NEXT: li a2, 128
+; CHECK-UNALIGNED-RV32-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-LABEL: bcmp_size_128:
+; CHECK-UNALIGNED-RV64: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-NEXT: li a2, 128
+; CHECK-UNALIGNED-RV64-NEXT: call bcmp
+; CHECK-UNALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV64-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-ZBB-LABEL: bcmp_size_128:
+; CHECK-UNALIGNED-RV32-ZBB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: li a2, 128
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-ZBB-LABEL: bcmp_size_128:
+; CHECK-UNALIGNED-RV64-ZBB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: li a2, 128
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-ZBKB-LABEL: bcmp_size_128:
+; CHECK-UNALIGNED-RV32-ZBKB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: li a2, 128
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-ZBKB-LABEL: bcmp_size_128:
+; CHECK-UNALIGNED-RV64-ZBKB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: li a2, 128
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_size_128:
+; CHECK-UNALIGNED-RV32-V: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-V-NEXT: li a2, 128
+; CHECK-UNALIGNED-RV32-V-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v8, (a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v16, (a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: vmsne.vv v24, v8, v16
+; CHECK-UNALIGNED-RV32-V-NEXT: vcpop.m a0, v24
+; CHECK-UNALIGNED-RV32-V-NEXT: snez a0, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_size_128:
+; CHECK-UNALIGNED-RV64-V: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-V-NEXT: li a2, 128
+; CHECK-UNALIGNED-RV64-V-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v8, (a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v16, (a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: vmsne.vv v24, v8, v16
+; CHECK-UNALIGNED-RV64-V-NEXT: vcpop.m a0, v24
+; CHECK-UNALIGNED-RV64-V-NEXT: snez a0, a0
+; CHECK-UNALIGNED-RV64-V-NEXT: ret
entry:
%bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 128)
ret i32 %bcmp
@@ -2412,7 +3092,7 @@ define i1 @bcmp_eq_zero(ptr %s1, ptr %s2) nounwind {
; CHECK-ALIGNED-RV32: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-NEXT: li a2, 4
+; CHECK-ALIGNED-RV32-NEXT: li a2, 16
; CHECK-ALIGNED-RV32-NEXT: call bcmp
; CHECK-ALIGNED-RV32-NEXT: seqz a0, a0
; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
@@ -2423,7 +3103,7 @@ define i1 @bcmp_eq_zero(ptr %s1, ptr %s2) nounwind {
; CHECK-ALIGNED-RV64: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-NEXT: li a2, 4
+; CHECK-ALIGNED-RV64-NEXT: li a2, 16
; CHECK-ALIGNED-RV64-NEXT: call bcmp
; CHECK-ALIGNED-RV64-NEXT: seqz a0, a0
; CHECK-ALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
@@ -2434,7 +3114,7 @@ define i1 @bcmp_eq_zero(ptr %s1, ptr %s2) nounwind {
; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 4
+; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 16
; CHECK-ALIGNED-RV32-ZBB-NEXT: call bcmp
; CHECK-ALIGNED-RV32-ZBB-NEXT: seqz a0, a0
; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
@@ -2445,7 +3125,7 @@ define i1 @bcmp_eq_zero(ptr %s1, ptr %s2) nounwind {
; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 4
+; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 16
; CHECK-ALIGNED-RV64-ZBB-NEXT: call bcmp
; CHECK-ALIGNED-RV64-ZBB-NEXT: seqz a0, a0
; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
@@ -2456,7 +3136,7 @@ define i1 @bcmp_eq_zero(ptr %s1, ptr %s2) nounwind {
; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 4
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 16
; CHECK-ALIGNED-RV32-ZBKB-NEXT: call bcmp
; CHECK-ALIGNED-RV32-ZBKB-NEXT: seqz a0, a0
; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
@@ -2467,7 +3147,7 @@ define i1 @bcmp_eq_zero(ptr %s1, ptr %s2) nounwind {
; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 4
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 16
; CHECK-ALIGNED-RV64-ZBKB-NEXT: call bcmp
; CHECK-ALIGNED-RV64-ZBKB-NEXT: seqz a0, a0
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
@@ -2478,7 +3158,7 @@ define i1 @bcmp_eq_zero(ptr %s1, ptr %s2) nounwind {
; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-V-NEXT: li a2, 4
+; CHECK-ALIGNED-RV32-V-NEXT: li a2, 16
; CHECK-ALIGNED-RV32-V-NEXT: call bcmp
; CHECK-ALIGNED-RV32-V-NEXT: seqz a0, a0
; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
@@ -2489,22 +3169,130 @@ define i1 @bcmp_eq_zero(ptr %s1, ptr %s2) nounwind {
; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-V-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-V-NEXT: li a2, 4
+; CHECK-ALIGNED-RV64-V-NEXT: li a2, 16
; CHECK-ALIGNED-RV64-V-NEXT: call bcmp
; CHECK-ALIGNED-RV64-V-NEXT: seqz a0, a0
; CHECK-ALIGNED-RV64-V-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-V-NEXT: ret
;
-; CHECK-UNALIGNED-LABEL: bcmp_eq_zero:
-; CHECK-UNALIGNED: # %bb.0: # %entry
-; CHECK-UNALIGNED-NEXT: lw a0, 0(a0)
-; CHECK-UNALIGNED-NEXT: lw a1, 0(a1)
-; CHECK-UNALIGNED-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-NEXT: seqz a0, a0
-; CHECK-UNALIGNED-NEXT: ret
+; CHECK-UNALIGNED-RV32-LABEL: bcmp_eq_zero:
+; CHECK-UNALIGNED-RV32: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-NEXT: lw a2, 0(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw a3, 4(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw a4, 8(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw a0, 12(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw a5, 0(a1)
+; CHECK-UNALIGNED-RV32-NEXT: lw a6, 4(a1)
+; CHECK-UNALIGNED-RV32-NEXT: lw a7, 8(a1)
+; CHECK-UNALIGNED-RV32-NEXT: lw a1, 12(a1)
+; CHECK-UNALIGNED-RV32-NEXT: xor a2, a2, a5
+; CHECK-UNALIGNED-RV32-NEXT: xor a3, a3, a6
+; CHECK-UNALIGNED-RV32-NEXT: xor a4, a4, a7
+; CHECK-UNALIGNED-RV32-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV32-NEXT: or a2, a2, a3
+; CHECK-UNALIGNED-RV32-NEXT: or a0, a4, a0
+; CHECK-UNALIGNED-RV32-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV32-NEXT: seqz a0, a0
+; CHECK-UNALIGNED-RV32-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-LABEL: bcmp_eq_zero:
+; CHECK-UNALIGNED-RV64: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-NEXT: ld a2, 0(a0)
+; CHECK-UNALIGNED-RV64-NEXT: ld a0, 8(a0)
+; CHECK-UNALIGNED-RV64-NEXT: ld a3, 0(a1)
+; CHECK-UNALIGNED-RV64-NEXT: ld a1, 8(a1)
+; CHECK-UNALIGNED-RV64-NEXT: xor a2, a2, a3
+; CHECK-UNALIGNED-RV64-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV64-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV64-NEXT: seqz a0, a0
+; CHECK-UNALIGNED-RV64-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-ZBB-LABEL: bcmp_eq_zero:
+; CHECK-UNALIGNED-RV32-ZBB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a2, 0(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a3, 4(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a4, 8(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a0, 12(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a5, 0(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a6, 4(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a7, 8(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a1, 12(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a2, a2, a5
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a3, a3, a6
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a4, a4, a7
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a2, a2, a3
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a0, a4, a0
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: seqz a0, a0
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-ZBB-LABEL: bcmp_eq_zero:
+; CHECK-UNALIGNED-RV64-ZBB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a2, 0(a0)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a0, 8(a0)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a3, 0(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a1, 8(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a2, a2, a3
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: seqz a0, a0
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-ZBKB-LABEL: bcmp_eq_zero:
+; CHECK-UNALIGNED-RV32-ZBKB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a2, 0(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a3, 4(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a4, 8(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a0, 12(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a5, 0(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a6, 4(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a7, 8(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a1, 12(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a2, a2, a5
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a3, a3, a6
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a4, a4, a7
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a2, a2, a3
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a0, a4, a0
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: seqz a0, a0
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-ZBKB-LABEL: bcmp_eq_zero:
+; CHECK-UNALIGNED-RV64-ZBKB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a2, 0(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a0, 8(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a3, 0(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a1, 8(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a2, a2, a3
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: seqz a0, a0
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_eq_zero:
+; CHECK-UNALIGNED-RV32-V: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-V-NEXT: vsetivli zero, 16, e8, m1, ta, ma
+; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v8, (a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v9, (a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: vmsne.vv v8, v8, v9
+; CHECK-UNALIGNED-RV32-V-NEXT: vcpop.m a0, v8
+; CHECK-UNALIGNED-RV32-V-NEXT: seqz a0, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_eq_zero:
+; CHECK-UNALIGNED-RV64-V: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-V-NEXT: vsetivli zero, 16, e8, m1, ta, ma
+; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v8, (a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v9, (a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: vmsne.vv v8, v8, v9
+; CHECK-UNALIGNED-RV64-V-NEXT: vcpop.m a0, v8
+; CHECK-UNALIGNED-RV64-V-NEXT: seqz a0, a0
+; CHECK-UNALIGNED-RV64-V-NEXT: ret
entry:
- %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 4)
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 16)
%ret = icmp eq i32 %bcmp, 0
ret i1 %ret
}
@@ -5980,213 +6768,209 @@ entry:
define i1 @memcmp_eq_zero(ptr %s1, ptr %s2) nounwind {
; CHECK-ALIGNED-RV32-LABEL: memcmp_eq_zero:
; CHECK-ALIGNED-RV32: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-NEXT: lbu a2, 1(a1)
-; CHECK-ALIGNED-RV32-NEXT: lbu a3, 2(a1)
-; CHECK-ALIGNED-RV32-NEXT: lbu a4, 3(a1)
-; CHECK-ALIGNED-RV32-NEXT: lbu a1, 0(a1)
-; CHECK-ALIGNED-RV32-NEXT: slli a2, a2, 8
-; CHECK-ALIGNED-RV32-NEXT: slli a3, a3, 16
-; CHECK-ALIGNED-RV32-NEXT: slli a4, a4, 24
-; CHECK-ALIGNED-RV32-NEXT: or a1, a2, a1
-; CHECK-ALIGNED-RV32-NEXT: or a3, a4, a3
-; CHECK-ALIGNED-RV32-NEXT: lbu a2, 1(a0)
-; CHECK-ALIGNED-RV32-NEXT: lbu a4, 0(a0)
-; CHECK-ALIGNED-RV32-NEXT: lbu a5, 2(a0)
-; CHECK-ALIGNED-RV32-NEXT: lbu a0, 3(a0)
-; CHECK-ALIGNED-RV32-NEXT: slli a2, a2, 8
-; CHECK-ALIGNED-RV32-NEXT: or a2, a2, a4
-; CHECK-ALIGNED-RV32-NEXT: slli a5, a5, 16
-; CHECK-ALIGNED-RV32-NEXT: slli a0, a0, 24
-; CHECK-ALIGNED-RV32-NEXT: or a0, a0, a5
-; CHECK-ALIGNED-RV32-NEXT: or a1, a3, a1
-; CHECK-ALIGNED-RV32-NEXT: or a0, a0, a2
-; CHECK-ALIGNED-RV32-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-NEXT: li a2, 16
+; CHECK-ALIGNED-RV32-NEXT: call memcmp
; CHECK-ALIGNED-RV32-NEXT: seqz a0, a0
+; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-NEXT: ret
;
; CHECK-ALIGNED-RV64-LABEL: memcmp_eq_zero:
; CHECK-ALIGNED-RV64: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-NEXT: lbu a2, 1(a1)
-; CHECK-ALIGNED-RV64-NEXT: lbu a3, 2(a1)
-; CHECK-ALIGNED-RV64-NEXT: lb a4, 3(a1)
-; CHECK-ALIGNED-RV64-NEXT: lbu a1, 0(a1)
-; CHECK-ALIGNED-RV64-NEXT: slli a2, a2, 8
-; CHECK-ALIGNED-RV64-NEXT: slli a3, a3, 16
-; CHECK-ALIGNED-RV64-NEXT: slli a4, a4, 24
-; CHECK-ALIGNED-RV64-NEXT: or a1, a2, a1
-; CHECK-ALIGNED-RV64-NEXT: or a3, a4, a3
-; CHECK-ALIGNED-RV64-NEXT: lbu a2, 1(a0)
-; CHECK-ALIGNED-RV64-NEXT: lbu a4, 0(a0)
-; CHECK-ALIGNED-RV64-NEXT: lbu a5, 2(a0)
-; CHECK-ALIGNED-RV64-NEXT: lb a0, 3(a0)
-; CHECK-ALIGNED-RV64-NEXT: slli a2, a2, 8
-; CHECK-ALIGNED-RV64-NEXT: or a2, a2, a4
-; CHECK-ALIGNED-RV64-NEXT: slli a5, a5, 16
-; CHECK-ALIGNED-RV64-NEXT: slli a0, a0, 24
-; CHECK-ALIGNED-RV64-NEXT: or a0, a0, a5
-; CHECK-ALIGNED-RV64-NEXT: or a1, a3, a1
-; CHECK-ALIGNED-RV64-NEXT: or a0, a0, a2
-; CHECK-ALIGNED-RV64-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-ALIGNED-RV64-NEXT: li a2, 16
+; CHECK-ALIGNED-RV64-NEXT: call memcmp
; CHECK-ALIGNED-RV64-NEXT: seqz a0, a0
+; CHECK-ALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-NEXT: ret
;
; CHECK-ALIGNED-RV32-ZBB-LABEL: memcmp_eq_zero:
; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 1(a1)
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 2(a1)
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a4, 3(a1)
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a1, 0(a1)
-; CHECK-ALIGNED-RV32-ZBB-NEXT: slli a2, a2, 8
-; CHECK-ALIGNED-RV32-ZBB-NEXT: slli a3, a3, 16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: slli a4, a4, 24
-; CHECK-ALIGNED-RV32-ZBB-NEXT: or a1, a2, a1
-; CHECK-ALIGNED-RV32-ZBB-NEXT: or a3, a4, a3
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 1(a0)
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a4, 0(a0)
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a5, 2(a0)
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a0, 3(a0)
-; CHECK-ALIGNED-RV32-ZBB-NEXT: slli a2, a2, 8
-; CHECK-ALIGNED-RV32-ZBB-NEXT: or a2, a2, a4
-; CHECK-ALIGNED-RV32-ZBB-NEXT: slli a5, a5, 16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: slli a0, a0, 24
-; CHECK-ALIGNED-RV32-ZBB-NEXT: or a0, a0, a5
-; CHECK-ALIGNED-RV32-ZBB-NEXT: or a1, a3, a1
-; CHECK-ALIGNED-RV32-ZBB-NEXT: or a0, a0, a2
-; CHECK-ALIGNED-RV32-ZBB-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: call memcmp
; CHECK-ALIGNED-RV32-ZBB-NEXT: seqz a0, a0
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
;
; CHECK-ALIGNED-RV64-ZBB-LABEL: memcmp_eq_zero:
; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 1(a1)
-; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 2(a1)
-; CHECK-ALIGNED-RV64-ZBB-NEXT: lb a4, 3(a1)
-; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a1, 0(a1)
-; CHECK-ALIGNED-RV64-ZBB-NEXT: slli a2, a2, 8
-; CHECK-ALIGNED-RV64-ZBB-NEXT: slli a3, a3, 16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: slli a4, a4, 24
-; CHECK-ALIGNED-RV64-ZBB-NEXT: or a1, a2, a1
-; CHECK-ALIGNED-RV64-ZBB-NEXT: or a3, a4, a3
-; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 1(a0)
-; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a4, 0(a0)
-; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a5, 2(a0)
-; CHECK-ALIGNED-RV64-ZBB-NEXT: lb a0, 3(a0)
-; CHECK-ALIGNED-RV64-ZBB-NEXT: slli a2, a2, 8
-; CHECK-ALIGNED-RV64-ZBB-NEXT: or a2, a2, a4
-; CHECK-ALIGNED-RV64-ZBB-NEXT: slli a5, a5, 16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: slli a0, a0, 24
-; CHECK-ALIGNED-RV64-ZBB-NEXT: or a0, a0, a5
-; CHECK-ALIGNED-RV64-ZBB-NEXT: or a1, a3, a1
-; CHECK-ALIGNED-RV64-ZBB-NEXT: or a0, a0, a2
-; CHECK-ALIGNED-RV64-ZBB-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 16
+; CHECK-ALIGNED-RV64-ZBB-NEXT: call memcmp
; CHECK-ALIGNED-RV64-ZBB-NEXT: seqz a0, a0
+; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
;
; CHECK-ALIGNED-RV32-ZBKB-LABEL: memcmp_eq_zero:
; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 0(a1)
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 1(a1)
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a4, 2(a1)
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a1, 3(a1)
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a5, 1(a0)
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a6, 2(a0)
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a7, 3(a0)
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a0, 0(a0)
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: packh a1, a4, a1
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: packh a2, a2, a3
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: packh a3, a6, a7
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: packh a0, a0, a5
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: pack a1, a2, a1
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: pack a0, a0, a3
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: call memcmp
; CHECK-ALIGNED-RV32-ZBKB-NEXT: seqz a0, a0
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
;
; CHECK-ALIGNED-RV64-ZBKB-LABEL: memcmp_eq_zero:
; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 0(a1)
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 1(a1)
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a4, 2(a1)
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: lb a1, 3(a1)
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a5, 0(a0)
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a6, 1(a0)
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: packh a2, a2, a3
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 2(a0)
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: lb a0, 3(a0)
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: packh a5, a5, a6
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: slli a4, a4, 16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: slli a1, a1, 24
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: or a1, a1, a4
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: slli a3, a3, 16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: slli a0, a0, 24
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: or a0, a0, a3
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: or a1, a1, a2
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: or a0, a0, a5
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 16
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: call memcmp
; CHECK-ALIGNED-RV64-ZBKB-NEXT: seqz a0, a0
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
;
; CHECK-ALIGNED-RV32-V-LABEL: memcmp_eq_zero:
; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-V-NEXT: lbu a2, 1(a1)
-; CHECK-ALIGNED-RV32-V-NEXT: lbu a3, 2(a1)
-; CHECK-ALIGNED-RV32-V-NEXT: lbu a4, 3(a1)
-; CHECK-ALIGNED-RV32-V-NEXT: lbu a1, 0(a1)
-; CHECK-ALIGNED-RV32-V-NEXT: slli a2, a2, 8
-; CHECK-ALIGNED-RV32-V-NEXT: slli a3, a3, 16
-; CHECK-ALIGNED-RV32-V-NEXT: slli a4, a4, 24
-; CHECK-ALIGNED-RV32-V-NEXT: or a1, a2, a1
-; CHECK-ALIGNED-RV32-V-NEXT: or a3, a4, a3
-; CHECK-ALIGNED-RV32-V-NEXT: lbu a2, 1(a0)
-; CHECK-ALIGNED-RV32-V-NEXT: lbu a4, 0(a0)
-; CHECK-ALIGNED-RV32-V-NEXT: lbu a5, 2(a0)
-; CHECK-ALIGNED-RV32-V-NEXT: lbu a0, 3(a0)
-; CHECK-ALIGNED-RV32-V-NEXT: slli a2, a2, 8
-; CHECK-ALIGNED-RV32-V-NEXT: or a2, a2, a4
-; CHECK-ALIGNED-RV32-V-NEXT: slli a5, a5, 16
-; CHECK-ALIGNED-RV32-V-NEXT: slli a0, a0, 24
-; CHECK-ALIGNED-RV32-V-NEXT: or a0, a0, a5
-; CHECK-ALIGNED-RV32-V-NEXT: or a1, a3, a1
-; CHECK-ALIGNED-RV32-V-NEXT: or a0, a0, a2
-; CHECK-ALIGNED-RV32-V-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-V-NEXT: li a2, 16
+; CHECK-ALIGNED-RV32-V-NEXT: call memcmp
; CHECK-ALIGNED-RV32-V-NEXT: seqz a0, a0
+; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-V-NEXT: ret
;
; CHECK-ALIGNED-RV64-V-LABEL: memcmp_eq_zero:
; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-V-NEXT: lbu a2, 1(a1)
-; CHECK-ALIGNED-RV64-V-NEXT: lbu a3, 2(a1)
-; CHECK-ALIGNED-RV64-V-NEXT: lb a4, 3(a1)
-; CHECK-ALIGNED-RV64-V-NEXT: lbu a1, 0(a1)
-; CHECK-ALIGNED-RV64-V-NEXT: slli a2, a2, 8
-; CHECK-ALIGNED-RV64-V-NEXT: slli a3, a3, 16
-; CHECK-ALIGNED-RV64-V-NEXT: slli a4, a4, 24
-; CHECK-ALIGNED-RV64-V-NEXT: or a1, a2, a1
-; CHECK-ALIGNED-RV64-V-NEXT: or a3, a4, a3
-; CHECK-ALIGNED-RV64-V-NEXT: lbu a2, 1(a0)
-; CHECK-ALIGNED-RV64-V-NEXT: lbu a4, 0(a0)
-; CHECK-ALIGNED-RV64-V-NEXT: lbu a5, 2(a0)
-; CHECK-ALIGNED-RV64-V-NEXT: lb a0, 3(a0)
-; CHECK-ALIGNED-RV64-V-NEXT: slli a2, a2, 8
-; CHECK-ALIGNED-RV64-V-NEXT: or a2, a2, a4
-; CHECK-ALIGNED-RV64-V-NEXT: slli a5, a5, 16
-; CHECK-ALIGNED-RV64-V-NEXT: slli a0, a0, 24
-; CHECK-ALIGNED-RV64-V-NEXT: or a0, a0, a5
-; CHECK-ALIGNED-RV64-V-NEXT: or a1, a3, a1
-; CHECK-ALIGNED-RV64-V-NEXT: or a0, a0, a2
-; CHECK-ALIGNED-RV64-V-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
+; CHECK-ALIGNED-RV64-V-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-ALIGNED-RV64-V-NEXT: li a2, 16
+; CHECK-ALIGNED-RV64-V-NEXT: call memcmp
; CHECK-ALIGNED-RV64-V-NEXT: seqz a0, a0
+; CHECK-ALIGNED-RV64-V-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-V-NEXT: ret
;
-; CHECK-UNALIGNED-LABEL: memcmp_eq_zero:
-; CHECK-UNALIGNED: # %bb.0: # %entry
-; CHECK-UNALIGNED-NEXT: lw a0, 0(a0)
-; CHECK-UNALIGNED-NEXT: lw a1, 0(a1)
-; CHECK-UNALIGNED-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-NEXT: seqz a0, a0
-; CHECK-UNALIGNED-NEXT: ret
+; CHECK-UNALIGNED-RV32-LABEL: memcmp_eq_zero:
+; CHECK-UNALIGNED-RV32: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-NEXT: lw a2, 0(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw a3, 4(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw a4, 8(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw a0, 12(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw a5, 0(a1)
+; CHECK-UNALIGNED-RV32-NEXT: lw a6, 4(a1)
+; CHECK-UNALIGNED-RV32-NEXT: lw a7, 8(a1)
+; CHECK-UNALIGNED-RV32-NEXT: lw a1, 12(a1)
+; CHECK-UNALIGNED-RV32-NEXT: xor a2, a2, a5
+; CHECK-UNALIGNED-RV32-NEXT: xor a3, a3, a6
+; CHECK-UNALIGNED-RV32-NEXT: xor a4, a4, a7
+; CHECK-UNALIGNED-RV32-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV32-NEXT: or a2, a2, a3
+; CHECK-UNALIGNED-RV32-NEXT: or a0, a4, a0
+; CHECK-UNALIGNED-RV32-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV32-NEXT: seqz a0, a0
+; CHECK-UNALIGNED-RV32-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-LABEL: memcmp_eq_zero:
+; CHECK-UNALIGNED-RV64: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-NEXT: ld a2, 0(a0)
+; CHECK-UNALIGNED-RV64-NEXT: ld a0, 8(a0)
+; CHECK-UNALIGNED-RV64-NEXT: ld a3, 0(a1)
+; CHECK-UNALIGNED-RV64-NEXT: ld a1, 8(a1)
+; CHECK-UNALIGNED-RV64-NEXT: xor a2, a2, a3
+; CHECK-UNALIGNED-RV64-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV64-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV64-NEXT: seqz a0, a0
+; CHECK-UNALIGNED-RV64-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-ZBB-LABEL: memcmp_eq_zero:
+; CHECK-UNALIGNED-RV32-ZBB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a2, 0(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a3, 4(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a4, 8(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a0, 12(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a5, 0(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a6, 4(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a7, 8(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a1, 12(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a2, a2, a5
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a3, a3, a6
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a4, a4, a7
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a2, a2, a3
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a0, a4, a0
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: seqz a0, a0
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-ZBB-LABEL: memcmp_eq_zero:
+; CHECK-UNALIGNED-RV64-ZBB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a2, 0(a0)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a0, 8(a0)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a3, 0(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a1, 8(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a2, a2, a3
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: seqz a0, a0
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-ZBKB-LABEL: memcmp_eq_zero:
+; CHECK-UNALIGNED-RV32-ZBKB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a2, 0(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a3, 4(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a4, 8(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a0, 12(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a5, 0(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a6, 4(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a7, 8(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a1, 12(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a2, a2, a5
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a3, a3, a6
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a4, a4, a7
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a2, a2, a3
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a0, a4, a0
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: seqz a0, a0
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-ZBKB-LABEL: memcmp_eq_zero:
+; CHECK-UNALIGNED-RV64-ZBKB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a2, 0(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a0, 8(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a3, 0(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a1, 8(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a2, a2, a3
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: seqz a0, a0
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-V-LABEL: memcmp_eq_zero:
+; CHECK-UNALIGNED-RV32-V: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-V-NEXT: vsetivli zero, 16, e8, m1, ta, ma
+; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v8, (a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v9, (a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: vmsne.vv v8, v8, v9
+; CHECK-UNALIGNED-RV32-V-NEXT: vcpop.m a0, v8
+; CHECK-UNALIGNED-RV32-V-NEXT: seqz a0, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-V-LABEL: memcmp_eq_zero:
+; CHECK-UNALIGNED-RV64-V: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-V-NEXT: vsetivli zero, 16, e8, m1, ta, ma
+; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v8, (a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v9, (a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: vmsne.vv v8, v8, v9
+; CHECK-UNALIGNED-RV64-V-NEXT: vcpop.m a0, v8
+; CHECK-UNALIGNED-RV64-V-NEXT: seqz a0, a0
+; CHECK-UNALIGNED-RV64-V-NEXT: ret
entry:
- %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 4)
+ %memcmp = call signext i32 @memcmp(ptr %s1, ptr %s2, iXLen 16)
%ret = icmp eq i32 %memcmp, 0
ret i1 %ret
}
More information about the llvm-commits
mailing list