[llvm] [Object][AMDGPU] Support REL relocations (PR #143966)
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Thu Jun 12 13:37:30 PDT 2025
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-debuginfo
Author: Scott Linder (slinder1)
<details>
<summary>Changes</summary>
---
Full diff: https://github.com/llvm/llvm-project/pull/143966.diff
3 Files Affected:
- (modified) llvm/docs/AMDGPUUsage.rst (+2-1)
- (modified) llvm/lib/Object/RelocationResolver.cpp (+4-2)
- (added) llvm/test/DebugInfo/AMDGPU/dwarfdump-rel.yaml (+86)
``````````diff
diff --git a/llvm/docs/AMDGPUUsage.rst b/llvm/docs/AMDGPUUsage.rst
index 174a497c51b26..4aea702a702ab 100644
--- a/llvm/docs/AMDGPUUsage.rst
+++ b/llvm/docs/AMDGPUUsage.rst
@@ -2709,7 +2709,8 @@ The following relocation types are supported:
the ``mesa3d`` OS, which does not support ``R_AMDGPU_ABS64``.
There is no current OS loader support for 32-bit programs and so
-``R_AMDGPU_ABS32`` is not used.
+``R_AMDGPU_ABS32`` is only generated for static relocations, for example to
+implement some DWARF32 forms.
.. _amdgpu-loaded-code-object-path-uniform-resource-identifier:
diff --git a/llvm/lib/Object/RelocationResolver.cpp b/llvm/lib/Object/RelocationResolver.cpp
index 8cf748aa5681c..b6318bbe3ab74 100644
--- a/llvm/lib/Object/RelocationResolver.cpp
+++ b/llvm/lib/Object/RelocationResolver.cpp
@@ -274,11 +274,13 @@ static bool supportsAmdgpu(uint64_t Type) {
}
static uint64_t resolveAmdgpu(uint64_t Type, uint64_t Offset, uint64_t S,
- uint64_t /*LocData*/, int64_t Addend) {
+ uint64_t LocData, int64_t Addend) {
+ assert((LocData == 0 || Addend == 0) &&
+ "one of LocData and Addend must be 0");
switch (Type) {
case ELF::R_AMDGPU_ABS32:
case ELF::R_AMDGPU_ABS64:
- return S + Addend;
+ return S + LocData + Addend;
default:
llvm_unreachable("Invalid relocation type");
}
diff --git a/llvm/test/DebugInfo/AMDGPU/dwarfdump-rel.yaml b/llvm/test/DebugInfo/AMDGPU/dwarfdump-rel.yaml
new file mode 100644
index 0000000000000..23b7f087e9570
--- /dev/null
+++ b/llvm/test/DebugInfo/AMDGPU/dwarfdump-rel.yaml
@@ -0,0 +1,86 @@
+# RUN: yaml2obj %s -o %t
+# RUN: llvm-dwarfdump -i %t | FileCheck %s
+
+# Test REL relocation handling for AMDGPU
+
+# CHECK: DW_TAG_compile_unit
+# CHECK: DW_AT_producer ("dxc")
+# CHECK: DW_AT_name (".\\example.hlsl")
+# CHECK: DW_AT_str_offsets_base (0x00000008)
+
+--- !ELF
+FileHeader:
+ Class: ELFCLASS64
+ Data: ELFDATA2LSB
+ OSABI: ELFOSABI_AMDGPU_PAL
+ Type: ET_REL
+ Machine: EM_AMDGPU
+ Flags: [ EF_AMDGPU_MACH_AMDGCN_GFX1201 ]
+ SectionHeaderStringTable: .strtab
+Sections:
+ - Name: .debug_abbrev
+ Type: SHT_PROGBITS
+ AddressAlign: 0x1
+ Content: 01110125251305032572171017110B120673178C0117000000
+ - Name: .debug_info
+ Type: SHT_PROGBITS
+ AddressAlign: 0x1
+ Content: 23000000050001080000000001000400010800000000000000005C000000080000000C00000000
+ - Name: .debug_str_offsets
+ Type: SHT_PROGBITS
+ AddressAlign: 0x1
+ Content: 0C000000050000000000000004000000
+ - Name: .rel.debug_info
+ Type: SHT_REL
+ Flags: [ SHF_INFO_LINK ]
+ Link: .symtab
+ AddressAlign: 0x8
+ Info: .debug_info
+ Relocations:
+ - Offset: 0x8
+ Symbol: .debug_abbrev
+ Type: R_AMDGPU_ABS32
+ - Offset: 0x11
+ Symbol: .debug_str_offsets
+ Type: R_AMDGPU_ABS32
+ - Name: .rel.debug_str_offsets
+ Type: SHT_REL
+ Flags: [ SHF_INFO_LINK ]
+ Link: .symtab
+ AddressAlign: 0x8
+ Info: .debug_str_offsets
+ Relocations:
+ - Offset: 0x8
+ Symbol: .debug_str
+ Type: R_AMDGPU_ABS32
+ - Offset: 0xC
+ Symbol: .debug_str
+ Type: R_AMDGPU_ABS32
+ - Type: SectionHeaderTable
+ Sections:
+ - Name: .strtab
+ - Name: .debug_abbrev
+ - Name: .debug_info
+ - Name: .rel.debug_info
+ - Name: .debug_str_offsets
+ - Name: .rel.debug_str_offsets
+ - Name: .debug_str
+ - Name: .symtab
+Symbols:
+ - Name: .debug_abbrev
+ Type: STT_SECTION
+ Section: .debug_abbrev
+ - Name: .debug_info
+ Type: STT_SECTION
+ Section: .debug_info
+ - Name: .debug_str_offsets
+ Type: STT_SECTION
+ Section: .debug_str_offsets
+ - Name: .debug_str
+ Type: STT_SECTION
+ Section: .debug_str
+DWARF:
+ debug_str:
+ - 'dxc'
+ - '.\example.hlsl'
+...
``````````
</details>
https://github.com/llvm/llvm-project/pull/143966
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