[llvm] [ADT] Simplify SparseBitVectorIterator. NFCI. (PR #143885)

[Jay Foad via llvm-commits]

jayfoad wrote:

> > This shows that the new implementation is faster for sparse SparseBitVectors but 4x slower when they get almost full.
> 
> Do we know how full the existing `SparseBitVector`s are in LLVM on average?

I don't know, and I'm not sure I have the time or energy to gather that kind of data.

Interestingly the 4x slowdown seems to be entirely due to using `llvm::countr_zero` to find the next bit set in a word, instead of a loop like:
```
      while (Bits && !(Bits & 1)) {
        Bits >>= 1;
        BitNumber += 1;
      }
```
I don't understand this. I have checked that `countr_zero` codegens to a single `tzcnt` instruction which is supposed to be pretty fast. I'm running my benchmark on an AMD Ryzen 9 9950X 16-Core Processor.

https://github.com/llvm/llvm-project/pull/143885