[llvm] [InstCombine] Combine trunc (lshr X, BW-1) to i1 --> icmp slt X, 0 (#142593) (PR #143846)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 12 06:55:08 PDT 2025
https://github.com/mayanksolanki393 updated https://github.com/llvm/llvm-project/pull/143846
>From cc2dfd887c74abf744c18a36ecf093c64f11cc3e Mon Sep 17 00:00:00 2001
From: mayanksolanki393 <mayanksolanki393 at gmail.com>
Date: Thu, 12 Jun 2025 07:16:30 +0000
Subject: [PATCH 1/4] [InstCombine] Combine trunc (lshr X, BW-1) to i1 --> icmp
slt X, 0 (#142593)
---
.../InstCombine/InstCombineCasts.cpp | 8 +++++++
.../InstCombine/2025-06-12-trunc-lshr.ll | 23 +++++++++++++++++++
2 files changed, 31 insertions(+)
create mode 100644 llvm/test/Transforms/InstCombine/2025-06-12-trunc-lshr.ll
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
index 2db79228bf0e6..24e34b6a09543 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
@@ -823,6 +823,14 @@ Instruction *InstCombinerImpl::visitTrunc(TruncInst &Trunc) {
Value *And = Builder.CreateAnd(X, MaskC);
return new ICmpInst(ICmpInst::ICMP_NE, And, Zero);
}
+
+ if (match(Src, m_AShr(m_Value(X), m_SpecificInt(SrcWidth - 1))) ||
+ match(Src, m_LShr(m_Value(X), m_SpecificInt(SrcWidth - 1)))) {
+ // trunc (ashr X, BW-1) to i1 --> icmp slt X, 0
+ // trunc (lshr X, BW-1) to i1 --> icmp slt X, 0
+ return new ICmpInst(ICmpInst::ICMP_SLT, X, Zero);
+ }
+
if (match(Src, m_OneUse(m_c_Or(m_LShr(m_Value(X), m_ImmConstant(C)),
m_Deferred(X))))) {
// trunc (or (lshr X, C), X) to i1 --> icmp ne (and X, C'), 0
diff --git a/llvm/test/Transforms/InstCombine/2025-06-12-trunc-lshr.ll b/llvm/test/Transforms/InstCombine/2025-06-12-trunc-lshr.ll
new file mode 100644
index 0000000000000..74576cda76204
--- /dev/null
+++ b/llvm/test/Transforms/InstCombine/2025-06-12-trunc-lshr.ll
@@ -0,0 +1,23 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
+; RUN: opt -S -passes=instcombine < %s | FileCheck %s
+
+define i1 @src(i32 %0, ptr writeonly captures(none) initializes((0, 4)) %p) local_unnamed_addr #0 {
+; CHECK-LABEL: define i1 @src(
+; CHECK-SAME: i32 [[TMP0:%.*]], ptr writeonly captures(none) initializes((0, 4)) [[P:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
+; CHECK-NEXT: [[COMMON_RET1:.*:]]
+; CHECK-NEXT: [[DOTLOBIT:%.*]] = lshr i32 [[TMP0]], 31
+; CHECK-NEXT: store i32 [[DOTLOBIT]], ptr [[P]], align 1
+; CHECK-NEXT: ret i1 false
+;
+common.ret1:
+ %.lobit = lshr i32 %0, 31
+ %1 = trunc nuw i32 %.lobit to i1
+ %2 = icmp slt i32 %0, 0
+ %not. = xor i1 %1, true
+ %common.ret1.op = select i1 %not., i1 %2, i1 false
+ store i32 %.lobit, ptr %p, align 1
+ ret i1 %common.ret1.op
+}
+
+attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) }
+
>From 55e87baa9613684c2e3613b43f368f329ec4becc Mon Sep 17 00:00:00 2001
From: mayanksolanki393 <mayanksolanki393 at gmail.com>
Date: Thu, 12 Jun 2025 09:04:55 +0000
Subject: [PATCH 2/4] [InstCombine] Combine trunc (lshr X, BW-1) to i1 --> icmp
slt X, 0 (#142593)
---
.../InstCombine/InstCombineCasts.cpp | 14 +--
.../InstCombine/2025-06-12-trunc-lshr.ll | 100 ++++++++++++++++--
2 files changed, 97 insertions(+), 17 deletions(-)
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
index 24e34b6a09543..7c027de888e93 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
@@ -815,6 +815,13 @@ Instruction *InstCombinerImpl::visitTrunc(TruncInst &Trunc) {
return new ICmpInst(ICmpInst::ICMP_EQ, X, CmpC);
}
+ if (match(Src, m_AShr(m_Value(X), m_SpecificInt(SrcWidth - 1))) ||
+ match(Src, m_LShr(m_Value(X), m_SpecificInt(SrcWidth - 1)))) {
+ // trunc (ashr X, BW-1) to i1 --> icmp slt X, 0
+ // trunc (lshr X, BW-1) to i1 --> icmp slt X, 0
+ return new ICmpInst(ICmpInst::ICMP_SLT, X, Zero);
+ }
+
Constant *C;
if (match(Src, m_OneUse(m_LShr(m_Value(X), m_ImmConstant(C))))) {
// trunc (lshr X, C) to i1 --> icmp ne (and X, C'), 0
@@ -824,13 +831,6 @@ Instruction *InstCombinerImpl::visitTrunc(TruncInst &Trunc) {
return new ICmpInst(ICmpInst::ICMP_NE, And, Zero);
}
- if (match(Src, m_AShr(m_Value(X), m_SpecificInt(SrcWidth - 1))) ||
- match(Src, m_LShr(m_Value(X), m_SpecificInt(SrcWidth - 1)))) {
- // trunc (ashr X, BW-1) to i1 --> icmp slt X, 0
- // trunc (lshr X, BW-1) to i1 --> icmp slt X, 0
- return new ICmpInst(ICmpInst::ICMP_SLT, X, Zero);
- }
-
if (match(Src, m_OneUse(m_c_Or(m_LShr(m_Value(X), m_ImmConstant(C)),
m_Deferred(X))))) {
// trunc (or (lshr X, C), X) to i1 --> icmp ne (and X, C'), 0
diff --git a/llvm/test/Transforms/InstCombine/2025-06-12-trunc-lshr.ll b/llvm/test/Transforms/InstCombine/2025-06-12-trunc-lshr.ll
index 74576cda76204..1c96dc4b7a51a 100644
--- a/llvm/test/Transforms/InstCombine/2025-06-12-trunc-lshr.ll
+++ b/llvm/test/Transforms/InstCombine/2025-06-12-trunc-lshr.ll
@@ -1,23 +1,103 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt -S -passes=instcombine < %s | FileCheck %s
-define i1 @src(i32 %0, ptr writeonly captures(none) initializes((0, 4)) %p) local_unnamed_addr #0 {
-; CHECK-LABEL: define i1 @src(
-; CHECK-SAME: i32 [[TMP0:%.*]], ptr writeonly captures(none) initializes((0, 4)) [[P:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
+define i1 @foo_pos1(i32 %i, ptr %p) {
+; CHECK-LABEL: define i1 @foo_pos1(
+; CHECK-SAME: i32 [[I:%.*]], ptr [[P:%.*]]) {
; CHECK-NEXT: [[COMMON_RET1:.*:]]
-; CHECK-NEXT: [[DOTLOBIT:%.*]] = lshr i32 [[TMP0]], 31
+; CHECK-NEXT: [[DOTLOBIT:%.*]] = lshr i32 [[I]], 31
; CHECK-NEXT: store i32 [[DOTLOBIT]], ptr [[P]], align 1
; CHECK-NEXT: ret i1 false
;
common.ret1:
- %.lobit = lshr i32 %0, 31
- %1 = trunc nuw i32 %.lobit to i1
- %2 = icmp slt i32 %0, 0
- %not. = xor i1 %1, true
- %common.ret1.op = select i1 %not., i1 %2, i1 false
+ %.lobit = lshr i32 %i, 31
+ %t = trunc nuw i32 %.lobit to i1
+ %b = icmp slt i32 %i, 0
+ %not. = xor i1 %t, true
+ %common.ret1.op = select i1 %not., i1 %b, i1 false
store i32 %.lobit, ptr %p, align 1
ret i1 %common.ret1.op
}
-attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) }
+define i1 @foo_pos2(i32 %i, ptr %p) {
+; CHECK-LABEL: define i1 @foo_pos2(
+; CHECK-SAME: i32 [[I:%.*]], ptr [[P:%.*]]) {
+; CHECK-NEXT: [[COMMON_RET1:.*:]]
+; CHECK-NEXT: [[DOTLOBIT:%.*]] = ashr i32 [[I]], 31
+; CHECK-NEXT: store i32 [[DOTLOBIT]], ptr [[P]], align 1
+; CHECK-NEXT: ret i1 false
+;
+common.ret1:
+ %.lobit = ashr i32 %i, 31
+ %t = trunc nuw i32 %.lobit to i1
+ %b = icmp slt i32 %i, 0
+ %not. = xor i1 %t, true
+ %common.ret1.op = select i1 %not., i1 %b, i1 false
+ store i32 %.lobit, ptr %p, align 1
+ ret i1 %common.ret1.op
+}
+
+define i1 @foo_pos3(i32 %i, ptr %p, ptr %q) {
+; CHECK-LABEL: define i1 @foo_pos3(
+; CHECK-SAME: i32 [[I:%.*]], ptr [[P:%.*]], ptr [[Q:%.*]]) {
+; CHECK-NEXT: [[COMMON_RET1:.*:]]
+; CHECK-NEXT: [[DOTLOBIT:%.*]] = lshr i32 [[I]], 31
+; CHECK-NEXT: store i32 [[DOTLOBIT]], ptr [[P]], align 1
+; CHECK-NEXT: store i32 [[DOTLOBIT]], ptr [[Q]], align 1
+; CHECK-NEXT: ret i1 false
+;
+common.ret1:
+ %.lobit = lshr i32 %i, 31
+ %t = trunc nuw i32 %.lobit to i1
+ %b = icmp slt i32 %i, 0
+ %not. = xor i1 %t, true
+ %common.ret1.op = select i1 %not., i1 %b, i1 false
+ store i32 %.lobit, ptr %p, align 1
+ store i32 %.lobit, ptr %q, align 1
+ ret i1 %common.ret1.op
+}
+
+define i1 @foo_neg1(i32 %i, ptr %p) {
+; CHECK-LABEL: define i1 @foo_neg1(
+; CHECK-SAME: i32 [[I:%.*]], ptr [[P:%.*]]) {
+; CHECK-NEXT: [[COMMON_RET1:.*:]]
+; CHECK-NEXT: [[DOTLOBIT:%.*]] = lshr i32 [[I]], 30
+; CHECK-NEXT: [[T:%.*]] = trunc nuw i32 [[DOTLOBIT]] to i1
+; CHECK-NEXT: [[B:%.*]] = icmp slt i32 [[I]], 0
+; CHECK-NEXT: [[NOT_:%.*]] = xor i1 [[T]], true
+; CHECK-NEXT: [[COMMON_RET1_OP:%.*]] = select i1 [[NOT_]], i1 [[B]], i1 false
+; CHECK-NEXT: store i32 [[DOTLOBIT]], ptr [[P]], align 1
+; CHECK-NEXT: ret i1 [[COMMON_RET1_OP]]
+;
+common.ret1:
+ %.lobit = lshr i32 %i, 30
+ %t = trunc nuw i32 %.lobit to i1
+ %b = icmp slt i32 %i, 0
+ %not. = xor i1 %t, true
+ %common.ret1.op = select i1 %not., i1 %b, i1 false
+ store i32 %.lobit, ptr %p, align 1
+ ret i1 %common.ret1.op
+}
+
+define i1 @foo_neg2(i32 %i, ptr %p) {
+; CHECK-LABEL: define i1 @foo_neg2(
+; CHECK-SAME: i32 [[I:%.*]], ptr [[P:%.*]]) {
+; CHECK-NEXT: [[COMMON_RET1:.*:]]
+; CHECK-NEXT: [[DOTLOBIT:%.*]] = ashr i32 [[I]], 30
+; CHECK-NEXT: [[T:%.*]] = trunc nuw i32 [[DOTLOBIT]] to i1
+; CHECK-NEXT: [[B:%.*]] = icmp slt i32 [[I]], 0
+; CHECK-NEXT: [[NOT_:%.*]] = xor i1 [[T]], true
+; CHECK-NEXT: [[COMMON_RET1_OP:%.*]] = select i1 [[NOT_]], i1 [[B]], i1 false
+; CHECK-NEXT: store i32 [[DOTLOBIT]], ptr [[P]], align 1
+; CHECK-NEXT: ret i1 [[COMMON_RET1_OP]]
+;
+common.ret1:
+ %.lobit = ashr i32 %i, 30
+ %t = trunc nuw i32 %.lobit to i1
+ %b = icmp slt i32 %i, 0
+ %not. = xor i1 %t, true
+ %common.ret1.op = select i1 %not., i1 %b, i1 false
+ store i32 %.lobit, ptr %p, align 1
+ ret i1 %common.ret1.op
+}
>From c8ab3a8b8c8752204fbafd835e9e9abd29f7de34 Mon Sep 17 00:00:00 2001
From: mayanksolanki393 <mayanksolanki393 at gmail.com>
Date: Thu, 12 Jun 2025 10:05:40 +0000
Subject: [PATCH 3/4] [InstCombine] Combine trunc (lshr X, BW-1) to i1 --> icmp
slt X, 0 (#142593)
---
...2025-06-12-trunc-lshr.ll => trunc-lshr.ll} | 94 +++++++++----------
1 file changed, 43 insertions(+), 51 deletions(-)
rename llvm/test/Transforms/InstCombine/{2025-06-12-trunc-lshr.ll => trunc-lshr.ll} (52%)
diff --git a/llvm/test/Transforms/InstCombine/2025-06-12-trunc-lshr.ll b/llvm/test/Transforms/InstCombine/trunc-lshr.ll
similarity index 52%
rename from llvm/test/Transforms/InstCombine/2025-06-12-trunc-lshr.ll
rename to llvm/test/Transforms/InstCombine/trunc-lshr.ll
index 1c96dc4b7a51a..4364b09cfa709 100644
--- a/llvm/test/Transforms/InstCombine/2025-06-12-trunc-lshr.ll
+++ b/llvm/test/Transforms/InstCombine/trunc-lshr.ll
@@ -1,66 +1,60 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt -S -passes=instcombine < %s | FileCheck %s
-define i1 @foo_pos1(i32 %i, ptr %p) {
-; CHECK-LABEL: define i1 @foo_pos1(
+define i1 @test1(i32 %i, ptr %p) {
+; CHECK-LABEL: define i1 @test1(
; CHECK-SAME: i32 [[I:%.*]], ptr [[P:%.*]]) {
-; CHECK-NEXT: [[COMMON_RET1:.*:]]
; CHECK-NEXT: [[DOTLOBIT:%.*]] = lshr i32 [[I]], 31
; CHECK-NEXT: store i32 [[DOTLOBIT]], ptr [[P]], align 1
; CHECK-NEXT: ret i1 false
;
-common.ret1:
- %.lobit = lshr i32 %i, 31
- %t = trunc nuw i32 %.lobit to i1
+ %lobit = lshr i32 %i, 31
+ %t = trunc nuw i32 %lobit to i1
%b = icmp slt i32 %i, 0
- %not. = xor i1 %t, true
- %common.ret1.op = select i1 %not., i1 %b, i1 false
- store i32 %.lobit, ptr %p, align 1
- ret i1 %common.ret1.op
+ %not = xor i1 %t, true
+ %op = select i1 %not, i1 %b, i1 false
+ store i32 %lobit, ptr %p, align 1
+ ret i1 %op
}
-define i1 @foo_pos2(i32 %i, ptr %p) {
-; CHECK-LABEL: define i1 @foo_pos2(
+define i1 @test2(i32 %i, ptr %p) {
+; CHECK-LABEL: define i1 @test2(
; CHECK-SAME: i32 [[I:%.*]], ptr [[P:%.*]]) {
-; CHECK-NEXT: [[COMMON_RET1:.*:]]
; CHECK-NEXT: [[DOTLOBIT:%.*]] = ashr i32 [[I]], 31
; CHECK-NEXT: store i32 [[DOTLOBIT]], ptr [[P]], align 1
; CHECK-NEXT: ret i1 false
;
-common.ret1:
- %.lobit = ashr i32 %i, 31
- %t = trunc nuw i32 %.lobit to i1
+ %lobit = ashr i32 %i, 31
+ %t = trunc nuw i32 %lobit to i1
%b = icmp slt i32 %i, 0
- %not. = xor i1 %t, true
- %common.ret1.op = select i1 %not., i1 %b, i1 false
- store i32 %.lobit, ptr %p, align 1
- ret i1 %common.ret1.op
+ %not = xor i1 %t, true
+ %op = select i1 %not, i1 %b, i1 false
+ store i32 %lobit, ptr %p, align 1
+ ret i1 %op
}
-define i1 @foo_pos3(i32 %i, ptr %p, ptr %q) {
-; CHECK-LABEL: define i1 @foo_pos3(
+define i1 @test3(i32 %i, ptr %p, ptr %q) {
+; CHECK-LABEL: define i1 @test3(
; CHECK-SAME: i32 [[I:%.*]], ptr [[P:%.*]], ptr [[Q:%.*]]) {
-; CHECK-NEXT: [[COMMON_RET1:.*:]]
; CHECK-NEXT: [[DOTLOBIT:%.*]] = lshr i32 [[I]], 31
; CHECK-NEXT: store i32 [[DOTLOBIT]], ptr [[P]], align 1
; CHECK-NEXT: store i32 [[DOTLOBIT]], ptr [[Q]], align 1
; CHECK-NEXT: ret i1 false
;
-common.ret1:
- %.lobit = lshr i32 %i, 31
- %t = trunc nuw i32 %.lobit to i1
+ %lobit = lshr i32 %i, 31
+ %t = trunc nuw i32 %lobit to i1
%b = icmp slt i32 %i, 0
- %not. = xor i1 %t, true
- %common.ret1.op = select i1 %not., i1 %b, i1 false
- store i32 %.lobit, ptr %p, align 1
- store i32 %.lobit, ptr %q, align 1
- ret i1 %common.ret1.op
+ %not = xor i1 %t, true
+ %op = select i1 %not, i1 %b, i1 false
+ store i32 %lobit, ptr %p, align 1
+ store i32 %lobit, ptr %q, align 1
+ ret i1 %op
}
-define i1 @foo_neg1(i32 %i, ptr %p) {
-; CHECK-LABEL: define i1 @foo_neg1(
+; Negative Test
+define i1 @test4(i32 %i, ptr %p) {
+; CHECK-LABEL: define i1 @test4(
; CHECK-SAME: i32 [[I:%.*]], ptr [[P:%.*]]) {
-; CHECK-NEXT: [[COMMON_RET1:.*:]]
; CHECK-NEXT: [[DOTLOBIT:%.*]] = lshr i32 [[I]], 30
; CHECK-NEXT: [[T:%.*]] = trunc nuw i32 [[DOTLOBIT]] to i1
; CHECK-NEXT: [[B:%.*]] = icmp slt i32 [[I]], 0
@@ -69,20 +63,19 @@ define i1 @foo_neg1(i32 %i, ptr %p) {
; CHECK-NEXT: store i32 [[DOTLOBIT]], ptr [[P]], align 1
; CHECK-NEXT: ret i1 [[COMMON_RET1_OP]]
;
-common.ret1:
- %.lobit = lshr i32 %i, 30
- %t = trunc nuw i32 %.lobit to i1
+ %lobit = lshr i32 %i, 30 ; should not fold as no. of bits shifted < BitWidth - 1
+ %t = trunc nuw i32 %lobit to i1
%b = icmp slt i32 %i, 0
- %not. = xor i1 %t, true
- %common.ret1.op = select i1 %not., i1 %b, i1 false
- store i32 %.lobit, ptr %p, align 1
- ret i1 %common.ret1.op
+ %not = xor i1 %t, true
+ %op = select i1 %not, i1 %b, i1 false
+ store i32 %lobit, ptr %p, align 1
+ ret i1 %op
}
-define i1 @foo_neg2(i32 %i, ptr %p) {
-; CHECK-LABEL: define i1 @foo_neg2(
+; Negative Test
+define i1 @test5(i32 %i, ptr %p) {
+; CHECK-LABEL: define i1 @test5(
; CHECK-SAME: i32 [[I:%.*]], ptr [[P:%.*]]) {
-; CHECK-NEXT: [[COMMON_RET1:.*:]]
; CHECK-NEXT: [[DOTLOBIT:%.*]] = ashr i32 [[I]], 30
; CHECK-NEXT: [[T:%.*]] = trunc nuw i32 [[DOTLOBIT]] to i1
; CHECK-NEXT: [[B:%.*]] = icmp slt i32 [[I]], 0
@@ -91,13 +84,12 @@ define i1 @foo_neg2(i32 %i, ptr %p) {
; CHECK-NEXT: store i32 [[DOTLOBIT]], ptr [[P]], align 1
; CHECK-NEXT: ret i1 [[COMMON_RET1_OP]]
;
-common.ret1:
- %.lobit = ashr i32 %i, 30
- %t = trunc nuw i32 %.lobit to i1
+ %lobit = ashr i32 %i, 30 ; should not fold as no. of bits shifted < BitWidth - 1
+ %t = trunc nuw i32 %lobit to i1
%b = icmp slt i32 %i, 0
- %not. = xor i1 %t, true
- %common.ret1.op = select i1 %not., i1 %b, i1 false
- store i32 %.lobit, ptr %p, align 1
- ret i1 %common.ret1.op
+ %not = xor i1 %t, true
+ %op = select i1 %not, i1 %b, i1 false
+ store i32 %lobit, ptr %p, align 1
+ ret i1 %op
}
>From 0658f3d782027a44360d35ec68bb8ebbf714ee56 Mon Sep 17 00:00:00 2001
From: mayanksolanki393 <mayanksolanki393 at gmail.com>
Date: Thu, 12 Jun 2025 13:54:37 +0000
Subject: [PATCH 4/4] [InstCombine] Combine trunc (lshr X, BW-1) to i1 --> icmp
slt X, 0 (#142593)
---
llvm/test/Transforms/InstCombine/logical-select.ll | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/llvm/test/Transforms/InstCombine/logical-select.ll b/llvm/test/Transforms/InstCombine/logical-select.ll
index 050a53406a9c5..87e05002665ce 100644
--- a/llvm/test/Transforms/InstCombine/logical-select.ll
+++ b/llvm/test/Transforms/InstCombine/logical-select.ll
@@ -807,9 +807,9 @@ define <2 x i16> @bitcast_vec_cond_commute3(<4 x i8> %cond, <2 x i16> %pc, <2 x
; CHECK-LABEL: @bitcast_vec_cond_commute3(
; CHECK-NEXT: [[C:%.*]] = mul <2 x i16> [[PC:%.*]], [[PC]]
; CHECK-NEXT: [[D:%.*]] = mul <2 x i16> [[PD:%.*]], [[PD]]
+; CHECK-NEXT: [[DOTNOT2:%.*]] = icmp slt <4 x i8> [[COND:%.*]], zeroinitializer
; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i16> [[D]] to <4 x i8>
; CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i16> [[C]] to <4 x i8>
-; CHECK-NEXT: [[DOTNOT2:%.*]] = icmp slt <4 x i8> [[COND:%.*]], zeroinitializer
; CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> [[DOTNOT2]], <4 x i8> [[TMP1]], <4 x i8> [[TMP2]]
; CHECK-NEXT: [[R:%.*]] = bitcast <4 x i8> [[TMP3]] to <2 x i16>
; CHECK-NEXT: ret <2 x i16> [[R]]
@@ -1069,8 +1069,8 @@ define <2 x i1> @not_d_bools_vector_poison(<2 x i1> %c, <2 x i1> %x, <2 x i1> %y
define i32 @not_d_allSignBits(i32 %cond, i32 %tval, i32 %fval) {
; CHECK-LABEL: @not_d_allSignBits(
-; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[FVAL:%.*]], -1
; CHECK-NEXT: [[DOTNOT2:%.*]] = icmp slt i32 [[COND:%.*]], 0
+; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[FVAL:%.*]], -1
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[DOTNOT2]], i32 [[TVAL:%.*]], i32 [[TMP1]]
; CHECK-NEXT: ret i32 [[SEL]]
;
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