[llvm] [DAG] Convert foldMaskedMerge to SDPatternMatch to match (m & x) | (~m & y) (PR #143855)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 12 01:34:13 PDT 2025
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-llvm-selectiondag
Author: woruyu (woruyu)
<details>
<summary>Changes</summary>
### Summary
This PR resolves https://github.com/llvm/llvm-project/issues/143363
Remove foldMaskedMergeImpl entirely to use SDPatternMatch
---
Full diff: https://github.com/llvm/llvm-project/pull/143855.diff
1 Files Affected:
- (modified) llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (+12-36)
``````````diff
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index e79a17e86bc87..19a02887ad315 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -8128,24 +8128,6 @@ static SDValue visitORCommutative(SelectionDAG &DAG, SDValue N0, SDValue N1,
return SDValue();
}
-static SDValue foldMaskedMergeImpl(SDValue AndL0, SDValue AndR0, SDValue AndL1,
- SDValue AndR1, const SDLoc &DL,
- SelectionDAG &DAG) {
- if (!isBitwiseNot(AndL0, true) || !AndL0->hasOneUse())
- return SDValue();
- SDValue NotOp = AndL0->getOperand(0);
- if (NotOp == AndR1)
- std::swap(AndR1, AndL1);
- if (NotOp != AndL1)
- return SDValue();
-
- EVT VT = AndL1.getValueType();
- SDValue Xor0 = DAG.getNode(ISD::XOR, DL, VT, AndR1, AndR0);
- SDValue And = DAG.getNode(ISD::AND, DL, VT, Xor0, NotOp);
- SDValue Xor1 = DAG.getNode(ISD::XOR, DL, VT, And, AndR0);
- return Xor1;
-}
-
/// Fold "masked merge" expressions like `(m & x) | (~m & y)` into the
/// equivalent `((x ^ y) & m) ^ y)` pattern.
/// This is typically a better representation for targets without a fused
@@ -8155,29 +8137,23 @@ static SDValue foldMaskedMerge(SDNode *Node, SelectionDAG &DAG,
// Note that masked-merge variants using XOR or ADD expressions are
// normalized to OR by InstCombine so we only check for OR.
assert(Node->getOpcode() == ISD::OR && "Must be called with ISD::OR node");
- SDValue N0 = Node->getOperand(0);
- if (N0->getOpcode() != ISD::AND || !N0->hasOneUse())
- return SDValue();
- SDValue N1 = Node->getOperand(1);
- if (N1->getOpcode() != ISD::AND || !N1->hasOneUse())
- return SDValue();
// If the target supports and-not, don't fold this.
if (TLI.hasAndNot(SDValue(Node, 0)))
return SDValue();
- SDValue N00 = N0->getOperand(0);
- SDValue N01 = N0->getOperand(1);
- SDValue N10 = N1->getOperand(0);
- SDValue N11 = N1->getOperand(1);
- if (SDValue Result = foldMaskedMergeImpl(N00, N01, N10, N11, DL, DAG))
- return Result;
- if (SDValue Result = foldMaskedMergeImpl(N01, N00, N10, N11, DL, DAG))
- return Result;
- if (SDValue Result = foldMaskedMergeImpl(N10, N11, N00, N01, DL, DAG))
- return Result;
- if (SDValue Result = foldMaskedMergeImpl(N11, N10, N00, N01, DL, DAG))
- return Result;
+ SDValue M, X, Y;
+ if (sd_match(Node, m_Or(m_OneUse(m_And(m_Value(M), m_Value(X))),
+ m_OneUse(m_And(m_OneUse(m_Not(m_Deferred(M))),
+ m_Value(Y))))) ||
+ sd_match(Node,
+ m_Or(m_OneUse(m_And(m_OneUse(m_Not(m_Value(M))), m_Value(Y))),
+ m_OneUse(m_And(m_Deferred(M), m_Value(X)))))) {
+ EVT VT = M.getValueType();
+ SDValue Xor = DAG.getNode(ISD::XOR, DL, VT, X, Y);
+ SDValue And = DAG.getNode(ISD::AND, DL, VT, Xor, M);
+ return DAG.getNode(ISD::XOR, DL, VT, And, Y);
+ }
return SDValue();
}
``````````
</details>
https://github.com/llvm/llvm-project/pull/143855
More information about the llvm-commits
mailing list