[llvm] [LoongArch] Add demanded bits support for [X]VMSKLTZ (PR #143528)
Lu Weining via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 12 00:59:15 PDT 2025
================
@@ -8192,3 +8210,56 @@ unsigned LoongArchTargetLowering::getNumRegistersForCallingConv(
return TargetLowering::getNumRegistersForCallingConv(Context, CC, VT);
}
+
+bool LoongArchTargetLowering::SimplifyDemandedBitsForTargetNode(
+ SDValue Op, const APInt &OriginalDemandedBits,
+ const APInt &OriginalDemandedElts, KnownBits &Known, TargetLoweringOpt &TLO,
+ unsigned Depth) const {
+ EVT VT = Op.getValueType();
+ unsigned BitWidth = OriginalDemandedBits.getBitWidth();
+ unsigned Opc = Op.getOpcode();
+ switch (Opc) {
+ case LoongArchISD::VMSKLTZ:
+ case LoongArchISD::XVMSKLTZ: {
+ SDValue Src = Op.getOperand(0);
+ MVT SrcVT = Src.getSimpleValueType();
+ unsigned SrcBits = SrcVT.getScalarSizeInBits();
+ unsigned NumElts = SrcVT.getVectorNumElements();
+
+ // If we don't need the sign bits at all just return zero.
+ if (OriginalDemandedBits.countr_zero() >= NumElts)
+ return TLO.CombineTo(Op, TLO.DAG.getConstant(0, SDLoc(Op), VT));
+
+ // Only demand the vector elements of the sign bits we need.
+ APInt KnownUndef, KnownZero;
+ APInt DemandedElts = OriginalDemandedBits.zextOrTrunc(NumElts);
+ if (SimplifyDemandedVectorElts(Src, DemandedElts, KnownUndef, KnownZero,
+ TLO, Depth + 1))
+ return true;
+
+ Known.Zero = KnownZero.zext(BitWidth);
+ Known.Zero.setHighBits(BitWidth - NumElts);
+
+ // [X]VMSKLTZ only uses the MSB from each vector element.
+ KnownBits KnownSrc;
+ APInt DemandedSrcBits = APInt::getSignMask(SrcBits);
+ if (SimplifyDemandedBits(Src, DemandedSrcBits, DemandedElts, KnownSrc, TLO,
+ Depth + 1))
+ return true;
+
+ if (KnownSrc.One[SrcBits - 1])
+ Known.One.setLowBits(NumElts);
+ else if (KnownSrc.Zero[SrcBits - 1])
+ Known.Zero.setLowBits(NumElts);
+
+ // Attempt to avoid multi-use os if we don't need anything from it.
----------------
SixWeining wrote:
```suggestion
// Attempt to avoid multi-use ops if we don't need anything from it.
```
https://github.com/llvm/llvm-project/pull/143528
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