[llvm] [StructurizeCFG] Order IF Else block using Heuristics (PR #139605)

[via llvm-commits]

ruiling wrote:

 > ISA with structurizeCFG with hoisting zero-cost instruction change - [https://godbolt.org/z/cEzs31dYq](url).

You missed something important. Hoisting is only part of the suggestion. The phi network also needs some change.
The key-point is there is no phi with poison incoming value in `Flow` block. It is assigned the hoisted value for threads taking the `if`->`Flow` edge.
```
%pair = type { i32, i32 }
define amdgpu_kernel void @test_extractelement_then_else(<4 x i32> %vec, i1 %cond, ptr %ptr) {

if:
  %cond.inv = xor i1 %cond, true
  %load_then = load %pair, ptr %ptr, align 4
  %a_then = extractvalue %pair %load_then, 0
  br i1 %cond.inv, label %else, label %Flow

else:                                             ; preds = %if
  %a_else = extractvalue %pair %load_then, 0
  %sum_else = add i32 %a_else, 1
  br label %Flow

Flow:                                             ; preds = %else, %if
  %phi = phi i32 [ %sum_else, %else ], [ %a_then, %if ]
  %1 = phi i1 [ false, %else ], [ true, %if ]
  br i1 %1, label %then, label %merge

then:                                             ; preds = %Flow
  br label %merge

merge:                                            ; preds = %then, %Flow
  store i32 %phi, ptr %ptr, align 4
  ret void
}
```

https://github.com/llvm/llvm-project/pull/139605