[llvm] AMDGPU: Remove redundant operand folding checks (PR #140587)

[Changpeng Fang via llvm-commits]

================
@@ -777,24 +777,6 @@ bool SIFoldOperandsImpl::tryAddToFoldList(
       return true;
   }
 
-  // Check the case where we might introduce a second constant operand to a
-  // scalar instruction
-  if (TII->isSALU(MI->getOpcode())) {
-    const MCInstrDesc &InstDesc = MI->getDesc();
-    const MCOperandInfo &OpInfo = InstDesc.operands()[OpNo];
-
-    // Fine if the operand can be encoded as an inline constant
-    if (!OpToFold->isReg() && !TII->isInlineConstant(*OpToFold, OpInfo)) {
-      // Otherwise check for another constant
-      for (unsigned i = 0, e = InstDesc.getNumOperands(); i != e; ++i) {
-        auto &Op = MI->getOperand(i);
-        if (OpNo != i && !Op.isReg() &&
-            !TII->isInlineConstant(Op, InstDesc.operands()[i]))
-          return false;
-      }
-    }
-  }
-
----------------
changpeng wrote:

I am seeing a regression because of the removal of the above code:
For the following instructions:
  %333:sreg_32 = S_MOV_B32 96
  %334:sreg_32 = S_OR_B32 %stack.35.argument10.addr, %333:sreg_32, implicit-def dead $scc

After folding:
  renamable $sgpr26 = S_OR_B32 896, 96, implicit-def dead $scc

@arsenm : can you explain why this pre-filtering is not necessary?  Thanks.

https://github.com/llvm/llvm-project/pull/140587