[llvm] [X86][BreakFalseDeps] Using reverse order for undef register selection (PR #137569)

[Phoebe Wang via llvm-commits]

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@@ -142,7 +144,12 @@ void RegisterClassInfo::compute(const TargetRegisterClass *RC) const {
 
   // FIXME: Once targets reserve registers instead of removing them from the
   // allocation order, we can simply use begin/end here.
-  ArrayRef<MCPhysReg> RawOrder = RC->getRawAllocationOrder(*MF);
+  ArrayRef<MCPhysReg> RawOrder = RC->getRawAllocationOrder(*MF, Reverse);
+  std::vector<MCPhysReg> ReverseOrder;
+  if (Reverse) {
+    llvm::append_range(ReverseOrder, reverse(RawOrder));
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phoebewang wrote:

`AltOrders` is used for customizing given RegisterClass. We always reverse the list so that we don't need to provide `AltOrders` for each RegisterClass.

The reason to customize `FR32X/FR64X/VR256X` here because the `X/YMM31` has longer encoding than `X/YMM0~15`. With the list reversed, we only need to overload such 3 classes.

https://github.com/llvm/llvm-project/pull/137569