[llvm] [NVPTX] support packed f32 instructions for sm_100+ (PR #126337)

[Alex MacLean via llvm-commits]

================
@@ -471,8 +471,13 @@ bool NVPTXDAGToDAGISel::tryEXTRACT_VECTOR_ELEMENT(SDNode *N) {
   // We only care about 16x2 as it's the only real vector type we
   // need to deal with.
   MVT VT = Vector.getSimpleValueType();
-  if (!Isv2x16VT(VT))
-    return false;
+  auto Opcode = NVPTX::I32toV2I16;
----------------
AlexMaclean wrote:

Lets flatten this logic out into something a little clearer like:
```
unsigned Opcode;
if (Isv2x16VT(VT))
  Opcode = NVPTX::I32toV2I16;
else if (VT == MVT::v2f32)
  Opcode = NVPTX::I64toV2I32;
else 
  return false;
```

https://github.com/llvm/llvm-project/pull/126337