[llvm] [AMDGPU][True16][CodeGen] atomic load/store i8 in true16 mode (PR #143044)

[Brox Chen via llvm-commits]

broxigarchen wrote:

> > Do we have any tests that the hi/lo half that is unused by the instruction is reused by another instruction? I think for the non-atomic test cases we do, and these should work the same, but the atomic tests just don't cover that behavior.
> 
> Let me add a test

I took a look and it seems some of the d16_hi insts could not be selected by atomic load due to some other codegen patterns impact. But I will merge this patch fiirst and open another patch later, since this patch applies vgpr16 which is a functional issue, while the codegen patterns are a code quality change.

https://github.com/llvm/llvm-project/pull/143044