[llvm] [NVPTX] Add family-specific architectures support (PR #141899)

[Artem Belevich via llvm-commits]

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@@ -33,20 +33,61 @@ class FeaturePTX<int version>:
    SubtargetFeature<"ptx"# version, "PTXVersion",
                     "" # version,
                     "Use PTX version " # version>;
-
+//
+// NVPTX Architecture Hierarchy and Ordering:
+// 
+// Family: 2/3/5/6/7/8/9/10/12 (Follows Onion model, older family is compatible with newer family)
+// Arch: 2*/3*/5*/6*/7*/8*/9*/10*/12*
+//
+// Family-specific: F*f : F*f > F* =>
+// + The plain base architecture is compatible with the family-specific architecture
+//   (e.g. sm_100 compatible with >= sm_100*f*)
+// + The family-specific architecture is compatible with future family-specific
+//   architectures within the same family (e.g. sm_100f compatible with >= sm_10X*f*
+//   but not with sm_12X*f*)
+//
+//    Family and SM Target Definition:
+//    +----------------+--------------------------------------------------------+
+//    | Family         | Target SM architectures included                       |
+//    +----------------+--------------------------------------------------------+
+//    | sm_10x family  | sm_100f, sm_103f, future targets in sm_10x family      |
+//    | sm_101 family  | sm_101f (exception)                                    |
+//    | sm_12x family  | sm_120f, sm_121f, future targets in sm_12x family      |
+//    +----------------+--------------------------------------------------------+
----------------
Artem-B wrote:

What's the intended purpose of the table? Just an illustration of architecture variants within the major architecture? 

What makes sm_101f an exception? What would em a non-exceptional case?


https://github.com/llvm/llvm-project/pull/141899