[llvm] [RISCV] Select unsigned bitfield extract for Xqcibm (PR #143354)

[Sudharsan Veeravalli via llvm-commits]

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@@ -674,13 +674,23 @@ bool RISCVDAGToDAGISel::trySignedBitfieldExtract(SDNode *Node) {
 bool RISCVDAGToDAGISel::tryUnsignedBitfieldExtract(SDNode *Node, SDLoc DL,
                                                    MVT VT, SDValue X,
                                                    unsigned Msb, unsigned Lsb) {
-  // Only supported with XTHeadBb/XAndesPerf at the moment.
-  if (!Subtarget->hasVendorXTHeadBb() && !Subtarget->hasVendorXAndesPerf())
+  unsigned Opc;
+
+  if (Subtarget->hasVendorXTHeadBb())
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svs-quic wrote:

Done

https://github.com/llvm/llvm-project/pull/143354