[llvm] [RISCV] Select unsigned bitfield extract for Xqcibm (PR #143354)

[Jim Lin via llvm-commits]

================
@@ -674,12 +674,24 @@ bool RISCVDAGToDAGISel::trySignedBitfieldExtract(SDNode *Node) {
 bool RISCVDAGToDAGISel::tryUnsignedBitfieldExtract(SDNode *Node, SDLoc DL,
                                                    MVT VT, SDValue X,
                                                    unsigned Msb, unsigned Lsb) {
-  // Only supported with XTHeadBb/XAndesPerf at the moment.
-  if (!Subtarget->hasVendorXTHeadBb() && !Subtarget->hasVendorXAndesPerf())
+  bool IsXTheadBb = Subtarget->hasVendorXTHeadBb();
+  bool IsXAndesPerf = Subtarget->hasVendorXAndesPerf();
+  bool IsXqcibm = Subtarget->hasVendorXqcibm();
+
+  // Only supported with XTHeadBb/XAndesPerf/Xqcibm at the moment.
+  if (!IsXTheadBb && !IsXAndesPerf && !IsXqcibm)
----------------
tclin914 wrote:

```suggestion
  unsigned Opc;
  if (Subtarget->hasVendorXTHeadBb())
    Opc = RISCV::TH_EXTU;
  else if (Subtarget->hasVendorXAndesPerf())
    Opc = RISCV::NDS_BFOZ;
  else if ( Subtarget->hasVendorXqcibm())
    Opc = RISCV::QC_EXTU;
  // Only supported with XTHeadBb/XAndesPerf/Xqcibm at the moment.
  else
    return false;
```

https://github.com/llvm/llvm-project/pull/143354