[llvm] [LOH] Don't emit AdrpAddStr when register could be clobbered (PR #142849)

[Ellis Hoag via llvm-commits]

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@@ -432,28 +443,24 @@ static void handleADRP(const MachineInstr &MI, AArch64FunctionInfo &AFI,
       // FIXME: Implement proper liveness tracking for all registers. For now,
       // don't emit the LOH if there are any instructions between the add and
       // the ldr.
-      MachineInstr *AddMI = const_cast<MachineInstr *>(Info.MI1);
-      const MachineInstr *LdrMI = Info.MI0;
-      auto AddIt = MachineBasicBlock::iterator(AddMI);
-      auto EndIt = AddMI->getParent()->end();
-      if (AddMI->getIterator() == EndIt || LdrMI != &*next_nodbg(AddIt, EndIt))
+      if (!areInstructionsConsecutive(Info.MI1, Info.MI0))
         break;
-
       LLVM_DEBUG(dbgs() << "Adding MCLOH_AdrpAddLdr:\n"
                         << '\t' << MI << '\t' << *Info.MI1 << '\t'
                         << *Info.MI0);
       AFI.addLOHDirective(MCLOH_AdrpAddLdr, {&MI, Info.MI1, Info.MI0});
       ++NumADDToLDR;
       break;
-    }
     case MCLOH_AdrpAddStr:
-      if (Info.MI1 != nullptr) {
-        LLVM_DEBUG(dbgs() << "Adding MCLOH_AdrpAddStr:\n"
-                          << '\t' << MI << '\t' << *Info.MI1 << '\t'
-                          << *Info.MI0);
-        AFI.addLOHDirective(MCLOH_AdrpAddStr, {&MI, Info.MI1, Info.MI0});
-        ++NumADDToSTR;
-      }
+      if (!Info.MI1)
----------------
ellishg wrote:

I was also confused about this. The reason we need it for `AdrpAddStr` and not `AdrpAddLdr` is because `AdrpAddLdr` starts out as a `AdrpLdr` and then is converted to a `AdrpAddLdr` by setting `MI1`. There is no `AdrpStr`, so `MI1` is set to null until it finds the `add` instruction.

https://github.com/llvm/llvm-project/blob/2c0a2261b1250c566624139a21371962ef0e489e/llvm/lib/Target/AArch64/AArch64CollectLOH.cpp#L297-L308

https://github.com/llvm/llvm-project/pull/142849