[llvm] [AMDGPU] Add DAG mutation to improve scheduling before barriers (PR #142716)

[Carl Ritson via llvm-commits]

perlfu wrote:

> I'm trying to understand this. In some cases the load is required to complete before the fence for correctness, so there must already be an edge in DAG representing that, right? So why do you need to add extra edges? Are you handling cases where the ordering was _not_ required for correctness? Or do you just want to set a different latency on the edge? If so, can't you use `adjustSchedDependency` for that?

In an earlier version of this I tried to add latency by introducing artificial edges with the new latency; however, this had no impact on scheduling.
In hind sight this was perhaps because they overlapped (in a src->dst sense) with the existing barrier edges -- although I had confirmed the new artificial edges were present in the DAG.
You are correct that I can achieve approximately the same result by modifying the latency on existing barrier edges.
(Although as you pointed out this doesn't handle if no edge was required for correctness.)
I have rewritten the patch to use this approach.

I was unaware of `adjustSchedDependency`, but from an initial inspection and experimentation the barrier edges are never passed to this function so it cannot be used to modify them.

https://github.com/llvm/llvm-project/pull/142716