[llvm] 9cacc41 - [AMDGPU] Move S_ADD_U64_PSEUDO handling into getVALUOp. NFC. (#142934)

[via llvm-commits]

Author: Jay Foad
Date: 2025-06-05T16:49:24+01:00
New Revision: 9cacc4138ea72cfdb25ffb2d326e4e7a6a3e22ff

URL: https://github.com/llvm/llvm-project/commit/9cacc4138ea72cfdb25ffb2d326e4e7a6a3e22ff
DIFF: https://github.com/llvm/llvm-project/commit/9cacc4138ea72cfdb25ffb2d326e4e7a6a3e22ff.diff

LOG: [AMDGPU] Move S_ADD_U64_PSEUDO handling into getVALUOp. NFC. (#142934)

S_ADD_U64_PSEUDO and S_SUB_U64_PSEUDO are not "special cases" so can be
handled in getVALUOp instead of moveToVALUImpl.

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/SIInstrInfo.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index a27d4eeee97f4..805f8e9acdca7 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -5528,6 +5528,10 @@ unsigned SIInstrInfo::getVALUOp(const MachineInstr &MI) const {
     return AMDGPU::V_ADD_CO_U32_e32;
   case AMDGPU::S_SUB_U32:
     return AMDGPU::V_SUB_CO_U32_e32;
+  case AMDGPU::S_ADD_U64_PSEUDO:
+    return AMDGPU::V_ADD_U64_PSEUDO;
+  case AMDGPU::S_SUB_U64_PSEUDO:
+    return AMDGPU::V_SUB_U64_PSEUDO;
   case AMDGPU::S_SUBB_U32: return AMDGPU::V_SUBB_U32_e32;
   case AMDGPU::S_MUL_I32: return AMDGPU::V_MUL_LO_U32_e64;
   case AMDGPU::S_MUL_HI_U32: return AMDGPU::V_MUL_HI_U32_e64;
@@ -7310,12 +7314,6 @@ void SIInstrInfo::moveToVALUImpl(SIInstrWorklist &Worklist,
   switch (Opcode) {
   default:
     break;
-  case AMDGPU::S_ADD_U64_PSEUDO:
-    NewOpcode = AMDGPU::V_ADD_U64_PSEUDO;
-    break;
-  case AMDGPU::S_SUB_U64_PSEUDO:
-    NewOpcode = AMDGPU::V_SUB_U64_PSEUDO;
-    break;
   case AMDGPU::S_ADD_I32:
   case AMDGPU::S_SUB_I32: {
     // FIXME: The u32 versions currently selected use the carry.