[llvm] [MIRParser] Report register class errors in a deterministic order (PR #142928)
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Thu Jun 5 01:57:56 PDT 2025
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-amdgpu
Author: Jay Foad (jayfoad)
<details>
<summary>Changes</summary>
---
Full diff: https://github.com/llvm/llvm-project/pull/142928.diff
2 Files Affected:
- (modified) llvm/lib/CodeGen/MIRParser/MIRParser.cpp (+19-9)
- (modified) llvm/test/CodeGen/MIR/AMDGPU/virtreg-uses-unallocatable-class.mir (+3-4)
``````````diff
diff --git a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
index a57bda54f9180..1e9fcf35255b6 100644
--- a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
@@ -763,22 +763,25 @@ bool MIRParserImpl::setupRegisterInfo(const PerFunctionMIParsingState &PFS,
MachineRegisterInfo &MRI = MF.getRegInfo();
const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
- bool Error = false;
+ SmallVector<std::string> Errors;
+
// Create VRegs
auto populateVRegInfo = [&](const VRegInfo &Info, const Twine &Name) {
Register Reg = Info.VReg;
switch (Info.Kind) {
case VRegInfo::UNKNOWN:
- error(Twine("Cannot determine class/bank of virtual register ") +
- Name + " in function '" + MF.getName() + "'");
- Error = true;
+ Errors.push_back(
+ (Twine("Cannot determine class/bank of virtual register ") + Name +
+ " in function '" + MF.getName() + "'")
+ .str());
break;
case VRegInfo::NORMAL:
if (!Info.D.RC->isAllocatable()) {
- error(Twine("Cannot use non-allocatable class '") +
- TRI->getRegClassName(Info.D.RC) + "' for virtual register " +
- Name + " in function '" + MF.getName() + "'");
- Error = true;
+ Errors.push_back((Twine("Cannot use non-allocatable class '") +
+ TRI->getRegClassName(Info.D.RC) +
+ "' for virtual register " + Name + " in function '" +
+ MF.getName() + "'")
+ .str());
break;
}
@@ -820,7 +823,14 @@ bool MIRParserImpl::setupRegisterInfo(const PerFunctionMIParsingState &PFS,
}
}
- return Error;
+ if (Errors.empty())
+ return false;
+
+ // Report errors in a deterministic order.
+ sort(Errors);
+ for (auto &E : Errors)
+ error(E);
+ return true;
}
bool MIRParserImpl::initializeFrameInfo(PerFunctionMIParsingState &PFS,
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/virtreg-uses-unallocatable-class.mir b/llvm/test/CodeGen/MIR/AMDGPU/virtreg-uses-unallocatable-class.mir
index e5daee29a52da..8a0e7a3d1e2b0 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/virtreg-uses-unallocatable-class.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/virtreg-uses-unallocatable-class.mir
@@ -1,14 +1,13 @@
-# UNSUPPORTED: reverse_iteration
# RUN: not llc -mtriple=amdgcn-- -mcpu=gfx900 -run-pass=none -o - %s 2>&1 | FileCheck %s
# Check a diagnostic is emitted if non-allocatable classes are used
# with virtual registers, and there's no assert.
-# CHECK: error: {{.*}}: Cannot use non-allocatable class 'TTMP_32' for virtual register named_use in function 'virtreg_unallocatable'
-# CHECK: error: {{.*}}: Cannot use non-allocatable class 'TTMP_32' for virtual register named_def in function 'virtreg_unallocatable'
# CHECK: error: {{.*}}: Cannot use non-allocatable class 'TTMP_32' for virtual register 0 in function 'virtreg_unallocatable'
-# CHECK: error: {{.*}}: Cannot use non-allocatable class 'TTMP_32' for virtual register 2 in function 'virtreg_unallocatable'
# CHECK: error: {{.*}}: Cannot use non-allocatable class 'TTMP_32' for virtual register 1 in function 'virtreg_unallocatable'
+# CHECK: error: {{.*}}: Cannot use non-allocatable class 'TTMP_32' for virtual register 2 in function 'virtreg_unallocatable'
+# CHECK: error: {{.*}}: Cannot use non-allocatable class 'TTMP_32' for virtual register named_def in function 'virtreg_unallocatable'
+# CHECK: error: {{.*}}: Cannot use non-allocatable class 'TTMP_32' for virtual register named_use in function 'virtreg_unallocatable'
---
name: virtreg_unallocatable
``````````
</details>
https://github.com/llvm/llvm-project/pull/142928
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