[llvm] [AMDGPU] Support bottom-up postRA scheduing. (PR #135295)

[Harrison Hao via llvm-commits]

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@@ -417,7 +417,11 @@ void GCNHazardRecognizer::AdvanceCycle() {
 }
 
 void GCNHazardRecognizer::RecedeCycle() {
-  llvm_unreachable("hazard recognizer does not support bottom-up scheduling.");
+  assert(!IsHazardRecognizerMode &&
+         "Bottom-up scheduling shouldn't run in hazard recognizer mode");
+  if (ST.getGeneration() < AMDGPUSubtarget::GFX11)
+    report_fatal_error("Hazard recognizer does not support bottom-up "
+                       "scheduling on pre‑GFX11.");
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harrisonGPU wrote:

I believe hazard recognition does not affect bottom-up scheduling, because the `Post-RA Hazard Recognizer` pass runs after the `Post-RA Machine Instruction Scheduler`.
It sets `IsHazardRecognizerMode` to true only when `PreEmitNoops` is invoked, as shown here:
https://github.com/llvm/llvm-project/blob/adbbb9049b0e91736ceb15d49a58d314b0f55bf1/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp#L297-L304
Furthermore, this hazard recognizer only uses AdvanceCycle, not RecedeCycle:https://github.com/llvm/llvm-project/blob/adbbb9049b0e91736ceb15d49a58d314b0f55bf1/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp#L283-L294

I do believe this feature is worth investigating further, as it could help hide long-latency instructions and potentially improve GPU performance.

Do you think I should add an assert or report a fatal error instead? I’d appreciate any suggestions you might have.

https://github.com/llvm/llvm-project/pull/135295