[llvm] [RegisterCoalescer]: Try inflated RC for coalescing reg->subreg (PR #134438)

[Matt Arsenault via llvm-commits]

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@@ -515,6 +517,12 @@ bool CoalescerPair::setRegisters(const MachineInstr *MI) {
       // SrcReg will be merged with a sub-register of DstReg.
       SrcIdx = DstSub;
       NewRC = TRI.getMatchingSuperRegClass(DstRC, SrcRC, DstSub);
+      if (!NewRC) {
+        auto SuperSrcRC = MRI.getLargestConstrainedSuperClass(Src);
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arsenm wrote:

No auto 

https://github.com/llvm/llvm-project/pull/134438