[llvm] [AMDGPU] Avoid put implicit_def into bundle that break reg's liveness (PR #142563)

[via llvm-commits]

Shoreshen wrote:

Hi @jayfoad , from my perspective of view, if we want:
1. Solve the use undefined problem
2. Do not alter the logic of machine instruction verifier

We cannot include implicit_def into the bundle because inside the bundle implicit def will not count for defined register and any use of this register in the latter program will cause the verification error.

There will be bundle break by not including implicit_def. If it causes the program generate worse code, then the only possibility would be we move the implicit_def in front of the bundle. 

However, SIPostRABundler and SIInsertHardClauses are all post RA pass, which means they are not SSA. So if we move the implicit_def, we need to make sure that there is no overlap liveness for the defining register of implicit_def.

For other meta instruction with an implicit-def or other non-meta instruction with an implicit-def can be within a bundle, I think I need some time to summarize it since I'm kind of a new bee for llvm codegen. But we can solve the current problem first.

In summary:
1. To prevent both implicit_def inside the bundle and break bundle result in worse code, what we can do is: 
- if the register it is defining doesn't overlap with other instruction, move the implicit_def into the front of the bundle
- if not, break the bundle and may result in worse code
2. For other instructions that has implicit_def that can occur in the bundle, I'll read the code and try to understand the logic. We can handle all of them in this PR or solve the current problem first in this PR

https://github.com/llvm/llvm-project/pull/142563