[llvm] [AMDGPU][True16][CodeGen] v_s_xxx_f16 t16 mode handling in movetoVALU process (PR #141152)

[Joe Nash via llvm-commits]

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@@ -1,5 +1,5 @@
-; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
-; RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -stop-after=si-fix-sgpr-copies -verify-machineinstrs < %s | FileCheck %s
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Sisyph wrote:

Should have a +real-true16 runline as well?

https://github.com/llvm/llvm-project/pull/141152