[llvm] a0adadd - [X86] Add test coverage for #62145

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2025-06-04T17:28:05+01:00
New Revision: a0adadd01fb5e3d063cb480c60b31df184d08256

URL: https://github.com/llvm/llvm-project/commit/a0adadd01fb5e3d063cb480c60b31df184d08256
DIFF: https://github.com/llvm/llvm-project/commit/a0adadd01fb5e3d063cb480c60b31df184d08256.diff

LOG: [X86] Add test coverage for #62145

Added: 
    llvm/test/CodeGen/X86/pr62145.ll

Modified: 
    

Removed: 
    


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diff  --git a/llvm/test/CodeGen/X86/pr62145.ll b/llvm/test/CodeGen/X86/pr62145.ll
new file mode 100644
index 0000000000000..509708fb417c4
--- /dev/null
+++ b/llvm/test/CodeGen/X86/pr62145.ll
@@ -0,0 +1,86 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=X86
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64
+
+define void @f(i64 %a, i64 %b) nounwind {
+; X86-LABEL: f:
+; X86:       # %bb.0: # %entry
+; X86-NEXT:    pushl %ebx
+; X86-NEXT:    pushl %edi
+; X86-NEXT:    pushl %esi
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT:    movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    movl $-65536, %ebx # imm = 0xFFFF0000
+; X86-NEXT:    movl $-589824, %edi # imm = 0xFFF70000
+; X86-NEXT:    cmpl $65527, %eax # imm = 0xFFF7
+; X86-NEXT:    jne .LBB0_2
+; X86-NEXT:  # %bb.1: # %if.then
+; X86-NEXT:    calll ext1 at PLT
+; X86-NEXT:  .LBB0_2: # %if.end
+; X86-NEXT:    calll ext2 at PLT
+; X86-NEXT:    andl %ebx, %esi
+; X86-NEXT:    xorl %edi, %esi
+; X86-NEXT:    jne .LBB0_3
+; X86-NEXT:  # %bb.4: # %if.then2
+; X86-NEXT:    popl %esi
+; X86-NEXT:    popl %edi
+; X86-NEXT:    popl %ebx
+; X86-NEXT:    jmp ext1 at PLT # TAILCALL
+; X86-NEXT:  .LBB0_3: # %if.end3
+; X86-NEXT:    popl %esi
+; X86-NEXT:    popl %edi
+; X86-NEXT:    popl %ebx
+; X86-NEXT:    retl
+;
+; X64-LABEL: f:
+; X64:       # %bb.0: # %entry
+; X64-NEXT:    pushq %r15
+; X64-NEXT:    pushq %r14
+; X64-NEXT:    pushq %rbx
+; X64-NEXT:    movq %rsi, %rbx
+; X64-NEXT:    movabsq $-281474976710656, %r14 # imm = 0xFFFF000000000000
+; X64-NEXT:    movabsq $-2533274790395904, %r15 # imm = 0xFFF7000000000000
+; X64-NEXT:    shrq $48, %rdi
+; X64-NEXT:    cmpl $65527, %edi # imm = 0xFFF7
+; X64-NEXT:    jne .LBB0_2
+; X64-NEXT:  # %bb.1: # %if.then
+; X64-NEXT:    callq ext1 at PLT
+; X64-NEXT:  .LBB0_2: # %if.end
+; X64-NEXT:    callq ext2 at PLT
+; X64-NEXT:    andq %r14, %rbx
+; X64-NEXT:    cmpq %r15, %rbx
+; X64-NEXT:    jne .LBB0_3
+; X64-NEXT:  # %bb.4: # %if.then2
+; X64-NEXT:    popq %rbx
+; X64-NEXT:    popq %r14
+; X64-NEXT:    popq %r15
+; X64-NEXT:    jmp ext1 at PLT # TAILCALL
+; X64-NEXT:  .LBB0_3: # %if.end3
+; X64-NEXT:    popq %rbx
+; X64-NEXT:    popq %r14
+; X64-NEXT:    popq %r15
+; X64-NEXT:    retq
+entry:
+  %shr.mask.i = and i64 %a, -281474976710656
+  %cmp.i = icmp eq i64 %shr.mask.i, -2533274790395904
+  br i1 %cmp.i, label %if.then, label %if.end
+
+if.then:
+  tail call void @ext1()
+  br label %if.end
+
+if.end:
+  tail call void @ext2()
+  %shr.mask.i4 = and i64 %b, -281474976710656
+  %cmp.i5 = icmp eq i64 %shr.mask.i4, -2533274790395904
+  br i1 %cmp.i5, label %if.then2, label %if.end3
+
+if.then2:
+  tail call void @ext1()
+  br label %if.end3
+
+if.end3:
+  ret void
+}
+declare void @ext1()
+declare void @ext2()