[llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)

[Janek van Oirschot via llvm-commits]

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@@ -5039,8 +5058,20 @@ SDValue AMDGPUTargetLowering::performFNegCombine(SDNode *N,
   }
   case ISD::SELECT: {
     // fneg (select c, a, b) -> select c, (fneg a), (fneg b)
+    // This combine became necessary recently to prevent a regression after v2i32 xor was made legal.
+    // When adding this combine a case was added to performFNEGCombine to prevent this combine from
+    // being undone under certain conditions.
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JanekvO wrote:

I think phrasing is a bit weird, `This combine became necessary recently to prevent a regression after v2i32 xor was made legal` implies that some previous patch made xor legal and caused this combine to be required now, but it's this patch that adds said legalization, no?

Also, requires a clang-format

https://github.com/llvm/llvm-project/pull/140694