[llvm] [RISCV] Select unsigned bitfield insert for XAndesPerf (PR #142737)
Pengcheng Wang via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 4 02:48:35 PDT 2025
================
@@ -688,6 +688,23 @@ bool RISCVDAGToDAGISel::tryUnsignedBitfieldExtract(SDNode *Node, SDLoc DL,
return true;
}
+bool RISCVDAGToDAGISel::tryUnsignedBitfieldInsertInZero(SDNode *Node, SDLoc DL,
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wangpc-pp wrote:
I think we can just inline this.
https://github.com/llvm/llvm-project/pull/142737
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