[llvm] [AArch64][GlobalISel] Ensure we have a insert-subreg v4i32 GPR pattern (PR #142724)

[Cullen Rhodes via llvm-commits]

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@@ -7269,6 +7269,13 @@ def : Pat<(v4i16 (vec_ins_or_scal_vec GPR32:$Rn)),
           (SUBREG_TO_REG (i32 0),
                          (f32 (COPY_TO_REGCLASS GPR32:$Rn, FPR32)), ssub)>;
 
+def : Pat<(v2i32 (vec_ins_or_scal_vec GPR32:$Rn)),
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c-rhodes wrote:

`vec_ins_or_scal_vec` also matches the SDAG form: https://github.com/llvm/llvm-project/blob/89e06f851c6cf0a65f7db51774233146156c9353/llvm/lib/Target/AArch64/AArch64InstrFormats.td#L184-L187 so there must be some existing patterns doing this for SDAG scalar_to_vector? The reason I ask is I would expect they could be removed with this handling both?



https://github.com/llvm/llvm-project/pull/142724