[llvm] [NVPTX] Add syncscope support for cmpxchg (PR #140812)

[Alex MacLean via llvm-commits]

================
@@ -2111,9 +2132,9 @@ multiclass F_ATOMIC_2<RegTyInfo t, string sem_str, string as_str, string op_str,
 }
 
 // has 3 operands
-multiclass F_ATOMIC_3<RegTyInfo t, string sem_str, string as_str, string op_str,
-                      SDPatternOperator op, list<Predicate> preds> {
-  defvar asm_str = "atom" # sem_str # as_str # "." # op_str # " \t$dst, [$addr], $b, $c;";
+multiclass F_ATOMIC_3<RegTyInfo t, string sem_str, string scope_str, string as_str, 
----------------
AlexMaclean wrote:

> `printLdStCode` also prints based on the "order" modifier, yet we support order for atomics in tablegen.

Maybe we should move to a flag for that too. 

I think it would be good to stick to the existing convention of using an immediate flag for scope. This is more consistent and avoid creating a huge number of instruction op-codes which would make any future MachineIR passes much more verbose. We should still be able to define the ISel logic via tablegen so no new C++ code would be required. 


https://github.com/llvm/llvm-project/pull/140812