[llvm] [llvm-exegesis] [AArch64] Resolving "not all operands are initialized by snippet generator" (PR #142529)

Lakshay Kumar via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 3 04:09:15 PDT 2025


================
@@ -229,6 +233,40 @@ class ExegesisAArch64Target : public ExegesisTarget {
   }
 };
 
+Error ExegesisAArch64Target::randomizeTargetMCOperand(
+    const Instruction &Instr, const Variable &Var, MCOperand &AssignedValue,
+    const BitVector &ForbiddenRegs) const {
+  const Operand &Op = Instr.getPrimaryOperand(Var);
+  const auto OperandType = Op.getExplicitOperandInfo().OperandType;
+  // Introducing some illegal instructions for (15) a few opcodes
----------------
lakshayk-nv wrote:

Yes, We would like to support these instructions. 
This patch in `--mode=inverse_throughput` for following opcodes `MRS`, `MSR`, `MSRpstatesvcrImm1`, `SYSLxt`, `SYSxt`, `UDF` to exit with handled error of `snippet crashed while running: Illegal instruction', they previously  exits with error "not all operands initialized ...".

Working on correctly init operands for above mentioned opcodes, Will add commit in this PR for them. 
Just wanted to state it explicitly, patch doesn't regress any working opcode.

[For completeness] Additionally, exegesis beforehand and with this patch too, throws illegal instruction in throughput mode, for these opcodes too (`APAS, DCPS1, DCPS2, DCPS3, HLT, HVC,  SMC, STGM, STZGM`). Will look into them later.

https://github.com/llvm/llvm-project/pull/142529


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