[llvm] 6206d7d - [X86] combineConstantPoolLoads - correctly merge constant pool loads by pointer and chain (#139575)

[via llvm-commits]

Author: Simon Pilgrim
Date: 2025-06-03T09:07:56+01:00
New Revision: 6206d7d3e1979e7f3e66538614f9f44413a16905

URL: https://github.com/llvm/llvm-project/commit/6206d7d3e1979e7f3e66538614f9f44413a16905
DIFF: https://github.com/llvm/llvm-project/commit/6206d7d3e1979e7f3e66538614f9f44413a16905.diff

LOG: [X86] combineConstantPoolLoads - correctly merge constant pool loads by pointer and chain (#139575)

We were merging with a larger constant pool load if it didn't have any
chain dependencies (and implicitly assuming all uses were on the vector
value), instead we should flip this, explicitly check for uses of the
vector value and merge the memory chain dependencies with
makeEquivalentMemoryOrdering.

As these are constant pool loads we shouldn't expect any changes here,
but we should be consistent with how we merge/reuse loads - an upcoming
patch for other loads will do the same as we will see changes there.

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86ISelLowering.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 71c699a318eb1..07a08a934ebb3 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -53035,7 +53035,7 @@ static SDValue combineConstantPoolLoads(SDNode *N, const SDLoc &dl,
         (User->getOpcode() == X86ISD::SUBV_BROADCAST_LOAD ||
          User->getOpcode() == X86ISD::VBROADCAST_LOAD ||
          ISD::isNormalLoad(User)) &&
-        UserLd->getChain() == Chain && !User->hasAnyUseOfValue(1) &&
+        UserLd->getChain() == Chain && User->hasAnyUseOfValue(0) &&
         User->getValueSizeInBits(0).getFixedValue() >
             RegVT.getFixedSizeInBits()) {
       EVT UserVT = User->getValueType(0);
@@ -53057,6 +53057,7 @@ static SDValue combineConstantPoolLoads(SDNode *N, const SDLoc &dl,
               getTargetConstantBitsFromNode(SDValue(User, 0), NumBits,
                                             UserUndefs, UserBits)) {
             if (MatchingBits(Undefs, UserUndefs, Bits, UserBits)) {
+              DAG.makeEquivalentMemoryOrdering(SDValue(N, 1), SDValue(User, 1));
               SDValue Extract = extractSubVector(SDValue(User, 0), 0, DAG, dl,
                                                  RegVT.getSizeInBits());
               Extract = DAG.getBitcast(RegVT, Extract);