[llvm] [X86][GlobalIsel] support G_FABS for f80 (PR #136718)
via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 3 00:26:58 PDT 2025
https://github.com/mahesh-attarde updated https://github.com/llvm/llvm-project/pull/136718
>From ca462c87f62a61af14c4af634d0d1f5cfc02788d Mon Sep 17 00:00:00 2001
From: mattarde <mattarde at intel.com>
Date: Tue, 22 Apr 2025 08:27:06 -0700
Subject: [PATCH 1/7] [X86][GlobalIsel] support fabs for f80
---
.../lib/Target/X86/GISel/X86LegalizerInfo.cpp | 5 +++++
.../CodeGen/X86/GlobalISel/fabs-scalar.ll | 20 +++++++++++++++++++
2 files changed, 25 insertions(+)
create mode 100644 llvm/test/CodeGen/X86/GlobalISel/fabs-scalar.ll
diff --git a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
index f008cb1bea839..d8c1fb5717df8 100644
--- a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
+++ b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
@@ -466,6 +466,11 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
(UseX87 && typeInSet(0, {s80})(Query));
});
+ //TODO: f32 and f64 FABS require xmm support
+ getActionDefinitionsBuilder(G_FABS)
+ .legalFor(UseX87, {s8, s80})
+ .lower();
+
// fp comparison
getActionDefinitionsBuilder(G_FCMP)
.legalFor(HasSSE1 || UseX87, {s8, s32})
diff --git a/llvm/test/CodeGen/X86/GlobalISel/fabs-scalar.ll b/llvm/test/CodeGen/X86/GlobalISel/fabs-scalar.ll
new file mode 100644
index 0000000000000..39ce3a492a33c
--- /dev/null
+++ b/llvm/test/CodeGen/X86/GlobalISel/fabs-scalar.ll
@@ -0,0 +1,20 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
+; RUN: llc < %s -mtriple=x86_64-linux -mattr=+x87,-sse,-sse2 | FileCheck %s -check-prefixes=X64
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel -mattr=+x87,-sse,-sse2 | FileCheck %s -check-prefixes=GISEL
+
+define x86_fp80 @test_x86_fp80_abs(x86_fp80 %arg) {
+; X64-LABEL: test_x86_fp80_abs:
+; X64: # %bb.0:
+; X64-NEXT: fldt {{[0-9]+}}(%rsp)
+; X64-NEXT: fabs
+; X64-NEXT: retq
+;
+; GISEL-LABEL: test_x86_fp80_abs:
+; GISEL: # %bb.0:
+; GISEL-NEXT: fldt {{[0-9]+}}(%rsp)
+; GISEL-NEXT: fabs
+; GISEL-NEXT: retq
+ %abs = tail call x86_fp80 @llvm.fabs.f80(x86_fp80 %arg)
+ ret x86_fp80 %abs
+}
>From 8a805397619bfc6aecc5914211e12be5afdff49e Mon Sep 17 00:00:00 2001
From: mattarde <mattarde at intel.com>
Date: Wed, 23 Apr 2025 22:40:23 -0700
Subject: [PATCH 2/7] add float and double
---
.../lib/Target/X86/GISel/X86LegalizerInfo.cpp | 5 +-
.../CodeGen/X86/GlobalISel/fabs-scalar.ll | 20 -------
llvm/test/CodeGen/X86/isel-fabs.ll | 52 +++++++++++++++++++
3 files changed, 53 insertions(+), 24 deletions(-)
delete mode 100644 llvm/test/CodeGen/X86/GlobalISel/fabs-scalar.ll
create mode 100644 llvm/test/CodeGen/X86/isel-fabs.ll
diff --git a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
index d8c1fb5717df8..106b62d0e6169 100644
--- a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
+++ b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
@@ -466,10 +466,7 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
(UseX87 && typeInSet(0, {s80})(Query));
});
- //TODO: f32 and f64 FABS require xmm support
- getActionDefinitionsBuilder(G_FABS)
- .legalFor(UseX87, {s8, s80})
- .lower();
+ getActionDefinitionsBuilder(G_FABS).legalFor(UseX87, {s8, s80}).lower();
// fp comparison
getActionDefinitionsBuilder(G_FCMP)
diff --git a/llvm/test/CodeGen/X86/GlobalISel/fabs-scalar.ll b/llvm/test/CodeGen/X86/GlobalISel/fabs-scalar.ll
deleted file mode 100644
index 39ce3a492a33c..0000000000000
--- a/llvm/test/CodeGen/X86/GlobalISel/fabs-scalar.ll
+++ /dev/null
@@ -1,20 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=+x87,-sse,-sse2 | FileCheck %s -check-prefixes=X64
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel -mattr=+x87,-sse,-sse2 | FileCheck %s -check-prefixes=GISEL
-
-define x86_fp80 @test_x86_fp80_abs(x86_fp80 %arg) {
-; X64-LABEL: test_x86_fp80_abs:
-; X64: # %bb.0:
-; X64-NEXT: fldt {{[0-9]+}}(%rsp)
-; X64-NEXT: fabs
-; X64-NEXT: retq
-;
-; GISEL-LABEL: test_x86_fp80_abs:
-; GISEL: # %bb.0:
-; GISEL-NEXT: fldt {{[0-9]+}}(%rsp)
-; GISEL-NEXT: fabs
-; GISEL-NEXT: retq
- %abs = tail call x86_fp80 @llvm.fabs.f80(x86_fp80 %arg)
- ret x86_fp80 %abs
-}
diff --git a/llvm/test/CodeGen/X86/isel-fabs.ll b/llvm/test/CodeGen/X86/isel-fabs.ll
new file mode 100644
index 0000000000000..59131ec3f1085
--- /dev/null
+++ b/llvm/test/CodeGen/X86/isel-fabs.ll
@@ -0,0 +1,52 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=0 -mattr=+x87,+sse,+sse2 -o - | FileCheck %s --check-prefix=X64
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=1 -mattr=+x87,+sse,+sse2 -o - | FileCheck %s -check-prefixes=GISEL
+
+define float @test_float_abs(float %arg) {
+; X64-LABEL: test_float_abs:
+; X64: # %bb.0:
+; X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
+; X64-NEXT: retq
+;
+; GISEL-LABEL: test_float_abs:
+; GISEL: # %bb.0:
+; GISEL-NEXT: movd %xmm0, %eax
+; GISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; GISEL-NEXT: movd %eax, %xmm0
+; GISEL-NEXT: retq
+ %abs = tail call float @llvm.fabs.f32(float %arg)
+ ret float %abs
+}
+
+define double @test_double_abs(double %arg) {
+; X64-LABEL: test_double_abs:
+; X64: # %bb.0:
+; X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
+; X64-NEXT: retq
+;
+; GISEL-LABEL: test_double_abs:
+; GISEL: # %bb.0:
+; GISEL-NEXT: movabsq $9223372036854775807, %rax # imm = 0x7FFFFFFFFFFFFFFF
+; GISEL-NEXT: movq %xmm0, %rcx
+; GISEL-NEXT: andq %rax, %rcx
+; GISEL-NEXT: movq %rcx, %xmm0
+; GISEL-NEXT: retq
+ %abs = tail call double @llvm.fabs.f64(double %arg)
+ ret double %abs
+}
+
+define x86_fp80 @test_x86_fp80_abs(x86_fp80 %arg) {
+; X64-LABEL: test_x86_fp80_abs:
+; X64: # %bb.0:
+; X64-NEXT: fldt {{[0-9]+}}(%rsp)
+; X64-NEXT: fabs
+; X64-NEXT: retq
+;
+; GISEL-LABEL: test_x86_fp80_abs:
+; GISEL: # %bb.0:
+; GISEL-NEXT: fldt {{[0-9]+}}(%rsp)
+; GISEL-NEXT: fabs
+; GISEL-NEXT: retq
+ %abs = tail call x86_fp80 @llvm.fabs.f80(x86_fp80 %arg)
+ ret x86_fp80 %abs
+}
>From 3ccc01b28d775e5a507ada44fc956e2b39a944bd Mon Sep 17 00:00:00 2001
From: mattarde <mattarde at intel.com>
Date: Thu, 1 May 2025 04:47:19 -0700
Subject: [PATCH 3/7] update test
---
llvm/test/CodeGen/X86/isel-fabs.ll | 66 ++++++++++++++++--------------
1 file changed, 35 insertions(+), 31 deletions(-)
diff --git a/llvm/test/CodeGen/X86/isel-fabs.ll b/llvm/test/CodeGen/X86/isel-fabs.ll
index 59131ec3f1085..1b5d990b7285d 100644
--- a/llvm/test/CodeGen/X86/isel-fabs.ll
+++ b/llvm/test/CodeGen/X86/isel-fabs.ll
@@ -1,36 +1,46 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=0 -mattr=+x87,+sse,+sse2 -o - | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=1 -mattr=+x87,+sse,+sse2 -o - | FileCheck %s -check-prefixes=GISEL
-
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=X64,SDAG-X64
+; RUN: llc < %s -mtriple=x86_64-- -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X64,FASTISEL-X64
+; RUN: llc < %s -mtriple=x86_64-- -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X64,GISEL-X64
define float @test_float_abs(float %arg) {
-; X64-LABEL: test_float_abs:
-; X64: # %bb.0:
-; X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
-; X64-NEXT: retq
+; SDAG-X64-LABEL: test_float_abs:
+; SDAG-X64: # %bb.0:
+; SDAG-X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
+; SDAG-X64-NEXT: retq
+;
+; FASTISEL-X64-LABEL: test_float_abs:
+; FASTISEL-X64: # %bb.0:
+; FASTISEL-X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
+; FASTISEL-X64-NEXT: retq
;
-; GISEL-LABEL: test_float_abs:
-; GISEL: # %bb.0:
-; GISEL-NEXT: movd %xmm0, %eax
-; GISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
-; GISEL-NEXT: movd %eax, %xmm0
-; GISEL-NEXT: retq
+; GISEL-X64-LABEL: test_float_abs:
+; GISEL-X64: # %bb.0:
+; GISEL-X64-NEXT: movd %xmm0, %eax
+; GISEL-X64-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; GISEL-X64-NEXT: movd %eax, %xmm0
+; GISEL-X64-NEXT: retq
%abs = tail call float @llvm.fabs.f32(float %arg)
ret float %abs
}
define double @test_double_abs(double %arg) {
-; X64-LABEL: test_double_abs:
-; X64: # %bb.0:
-; X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
-; X64-NEXT: retq
+; SDAG-X64-LABEL: test_double_abs:
+; SDAG-X64: # %bb.0:
+; SDAG-X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
+; SDAG-X64-NEXT: retq
;
-; GISEL-LABEL: test_double_abs:
-; GISEL: # %bb.0:
-; GISEL-NEXT: movabsq $9223372036854775807, %rax # imm = 0x7FFFFFFFFFFFFFFF
-; GISEL-NEXT: movq %xmm0, %rcx
-; GISEL-NEXT: andq %rax, %rcx
-; GISEL-NEXT: movq %rcx, %xmm0
-; GISEL-NEXT: retq
+; FASTISEL-X64-LABEL: test_double_abs:
+; FASTISEL-X64: # %bb.0:
+; FASTISEL-X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
+; FASTISEL-X64-NEXT: retq
+;
+; GISEL-X64-LABEL: test_double_abs:
+; GISEL-X64: # %bb.0:
+; GISEL-X64-NEXT: movabsq $9223372036854775807, %rax # imm = 0x7FFFFFFFFFFFFFFF
+; GISEL-X64-NEXT: movq %xmm0, %rcx
+; GISEL-X64-NEXT: andq %rax, %rcx
+; GISEL-X64-NEXT: movq %rcx, %xmm0
+; GISEL-X64-NEXT: retq
%abs = tail call double @llvm.fabs.f64(double %arg)
ret double %abs
}
@@ -41,12 +51,6 @@ define x86_fp80 @test_x86_fp80_abs(x86_fp80 %arg) {
; X64-NEXT: fldt {{[0-9]+}}(%rsp)
; X64-NEXT: fabs
; X64-NEXT: retq
-;
-; GISEL-LABEL: test_x86_fp80_abs:
-; GISEL: # %bb.0:
-; GISEL-NEXT: fldt {{[0-9]+}}(%rsp)
-; GISEL-NEXT: fabs
-; GISEL-NEXT: retq
%abs = tail call x86_fp80 @llvm.fabs.f80(x86_fp80 %arg)
ret x86_fp80 %abs
}
>From 6f63c12d51200ab38508634e6838094d75a349af Mon Sep 17 00:00:00 2001
From: mattarde <mattarde at intel.com>
Date: Thu, 1 May 2025 10:53:19 -0700
Subject: [PATCH 4/7] remove s8
---
llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
index 106b62d0e6169..c583950cb535a 100644
--- a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
+++ b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
@@ -466,7 +466,7 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
(UseX87 && typeInSet(0, {s80})(Query));
});
- getActionDefinitionsBuilder(G_FABS).legalFor(UseX87, {s8, s80}).lower();
+ getActionDefinitionsBuilder(G_FABS).legalFor(UseX87, {s80}).lower();
// fp comparison
getActionDefinitionsBuilder(G_FCMP)
>From 40806b7db9e535c9935c427b246cd16bde9794dd Mon Sep 17 00:00:00 2001
From: mattarde <mattarde at intel.com>
Date: Tue, 27 May 2025 00:49:09 -0700
Subject: [PATCH 5/7] update fabs for f32 and f64
---
.../CodeGen/GlobalISel/LegalizerHelper.cpp | 2 +-
.../X86/GISel/X86InstructionSelector.cpp | 2 +-
.../lib/Target/X86/GISel/X86LegalizerInfo.cpp | 4 +-
llvm/test/CodeGen/X86/isel-fabs-x87.ll | 33 ++++++++++
llvm/test/CodeGen/X86/isel-fabs.ll | 60 +++++++++++++++----
5 files changed, 85 insertions(+), 16 deletions(-)
create mode 100644 llvm/test/CodeGen/X86/isel-fabs-x87.ll
diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
index 4052060271331..f2458ce4b68b0 100644
--- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
@@ -9394,7 +9394,7 @@ LegalizerHelper::LegalizeResult LegalizerHelper::lowerFAbs(MachineInstr &MI) {
MIRBuilder.buildConstant(
Ty, APInt::getSignedMaxValue(Ty.getScalarSizeInBits())));
- MI.eraseFromParent();
+ MI.eraseFromParent();
return Legalized;
}
diff --git a/llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp b/llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
index ea08f71b8af4a..3713e0cf18d09 100644
--- a/llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
+++ b/llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
@@ -94,7 +94,7 @@ class X86InstructionSelector : public InstructionSelector {
bool selectCmp(MachineInstr &I, MachineRegisterInfo &MRI,
MachineFunction &MF) const;
bool selectFCmp(MachineInstr &I, MachineRegisterInfo &MRI,
- MachineFunction &MF) const;
+ MachineFunction &MF) const;
bool selectUAddSub(MachineInstr &I, MachineRegisterInfo &MRI,
MachineFunction &MF) const;
bool selectDebugInstr(MachineInstr &I, MachineRegisterInfo &MRI) const;
diff --git a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
index c583950cb535a..e3635218f1d2d 100644
--- a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
+++ b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
@@ -466,7 +466,9 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
(UseX87 && typeInSet(0, {s80})(Query));
});
- getActionDefinitionsBuilder(G_FABS).legalFor(UseX87, {s80}).lower();
+ getActionDefinitionsBuilder(G_FABS)
+ .legalFor(UseX87 && !HasSSE2, {s32, s64, s80})
+ .lower();
// fp comparison
getActionDefinitionsBuilder(G_FCMP)
diff --git a/llvm/test/CodeGen/X86/isel-fabs-x87.ll b/llvm/test/CodeGen/X86/isel-fabs-x87.ll
new file mode 100644
index 0000000000000..6d2ef980a6a32
--- /dev/null
+++ b/llvm/test/CodeGen/X86/isel-fabs-x87.ll
@@ -0,0 +1,33 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=SDAG-X64
+; RUN: llc < %s -mtriple=x86_64-- -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=FASTISEL-X64
+; RUN: llc < %s -mtriple=x86_64-- -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
+; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse | FileCheck %s --check-prefixes=X86,SDAG-X86
+; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X86,FASTISEL-X86
+; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86,GISEL-X86
+
+define x86_fp80 @test_x86_fp80_abs(x86_fp80 %arg) {
+; SDAG-X64-LABEL: test_x86_fp80_abs:
+; SDAG-X64: # %bb.0:
+; SDAG-X64-NEXT: fldt {{[0-9]+}}(%rsp)
+; SDAG-X64-NEXT: fabs
+; SDAG-X64-NEXT: retq
+;
+; FASTISEL-X64-LABEL: test_x86_fp80_abs:
+; FASTISEL-X64: # %bb.0:
+; FASTISEL-X64-NEXT: fldt {{[0-9]+}}(%rsp)
+; FASTISEL-X64-NEXT: fabs
+; FASTISEL-X64-NEXT: retq
+;
+; X86-LABEL: test_x86_fp80_abs:
+; X86: # %bb.0:
+; X86-NEXT: fldt {{[0-9]+}}(%esp)
+; X86-NEXT: fabs
+; X86-NEXT: retl
+ %abs = tail call x86_fp80 @llvm.fabs.f80(x86_fp80 %arg)
+ ret x86_fp80 %abs
+}
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; FASTISEL-X86: {{.*}}
+; GISEL-X86: {{.*}}
+; SDAG-X86: {{.*}}
diff --git a/llvm/test/CodeGen/X86/isel-fabs.ll b/llvm/test/CodeGen/X86/isel-fabs.ll
index 1b5d990b7285d..9e9e57ae80df4 100644
--- a/llvm/test/CodeGen/X86/isel-fabs.ll
+++ b/llvm/test/CodeGen/X86/isel-fabs.ll
@@ -1,7 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=X64,SDAG-X64
-; RUN: llc < %s -mtriple=x86_64-- -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X64,FASTISEL-X64
-; RUN: llc < %s -mtriple=x86_64-- -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X64,GISEL-X64
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=SDAG-X64
+; RUN: llc < %s -mtriple=x86_64-- -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=FASTISEL-X64
+; RUN: llc < %s -mtriple=x86_64-- -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
+; RUN: llc < %s -mtriple=i686-- -mattr=-x87 | FileCheck %s --check-prefixes=SDAG-X86
+; RUN: llc < %s -mtriple=i686-- -mattr=-x87 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=FASTISEL-X86
+; RUN: llc < %s -mtriple=i686-- -mattr=-x87 -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86
+
define float @test_float_abs(float %arg) {
; SDAG-X64-LABEL: test_float_abs:
; SDAG-X64: # %bb.0:
@@ -19,6 +23,24 @@ define float @test_float_abs(float %arg) {
; GISEL-X64-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
; GISEL-X64-NEXT: movd %eax, %xmm0
; GISEL-X64-NEXT: retq
+;
+; SDAG-X86-LABEL: test_float_abs:
+; SDAG-X86: # %bb.0:
+; SDAG-X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
+; SDAG-X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; SDAG-X86-NEXT: retl
+;
+; FASTISEL-X86-LABEL: test_float_abs:
+; FASTISEL-X86: # %bb.0:
+; FASTISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; FASTISEL-X86-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; FASTISEL-X86-NEXT: retl
+;
+; GISEL-X86-LABEL: test_float_abs:
+; GISEL-X86: # %bb.0:
+; GISEL-X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
+; GISEL-X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; GISEL-X86-NEXT: retl
%abs = tail call float @llvm.fabs.f32(float %arg)
ret float %abs
}
@@ -41,16 +63,28 @@ define double @test_double_abs(double %arg) {
; GISEL-X64-NEXT: andq %rax, %rcx
; GISEL-X64-NEXT: movq %rcx, %xmm0
; GISEL-X64-NEXT: retq
+;
+; SDAG-X86-LABEL: test_double_abs:
+; SDAG-X86: # %bb.0:
+; SDAG-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; SDAG-X86-NEXT: movl $2147483647, %edx # imm = 0x7FFFFFFF
+; SDAG-X86-NEXT: andl {{[0-9]+}}(%esp), %edx
+; SDAG-X86-NEXT: retl
+;
+; FASTISEL-X86-LABEL: test_double_abs:
+; FASTISEL-X86: # %bb.0:
+; FASTISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; FASTISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; FASTISEL-X86-NEXT: andl $2147483647, %edx # imm = 0x7FFFFFFF
+; FASTISEL-X86-NEXT: retl
+;
+; GISEL-X86-LABEL: test_double_abs:
+; GISEL-X86: # %bb.0:
+; GISEL-X86-NEXT: movl $-1, %eax
+; GISEL-X86-NEXT: movl $2147483647, %edx # imm = 0x7FFFFFFF
+; GISEL-X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; GISEL-X86-NEXT: andl {{[0-9]+}}(%esp), %edx
+; GISEL-X86-NEXT: retl
%abs = tail call double @llvm.fabs.f64(double %arg)
ret double %abs
}
-
-define x86_fp80 @test_x86_fp80_abs(x86_fp80 %arg) {
-; X64-LABEL: test_x86_fp80_abs:
-; X64: # %bb.0:
-; X64-NEXT: fldt {{[0-9]+}}(%rsp)
-; X64-NEXT: fabs
-; X64-NEXT: retq
- %abs = tail call x86_fp80 @llvm.fabs.f80(x86_fp80 %arg)
- ret x86_fp80 %abs
-}
>From ff54c7ac66ad1853d38ea6c7b4b02bcb9dd624b8 Mon Sep 17 00:00:00 2001
From: mattarde <mattarde at intel.com>
Date: Tue, 27 May 2025 00:53:38 -0700
Subject: [PATCH 6/7] fix indent
---
llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 2 +-
llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
index f2458ce4b68b0..4052060271331 100644
--- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
@@ -9394,7 +9394,7 @@ LegalizerHelper::LegalizeResult LegalizerHelper::lowerFAbs(MachineInstr &MI) {
MIRBuilder.buildConstant(
Ty, APInt::getSignedMaxValue(Ty.getScalarSizeInBits())));
- MI.eraseFromParent();
+ MI.eraseFromParent();
return Legalized;
}
diff --git a/llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp b/llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
index 3713e0cf18d09..ea08f71b8af4a 100644
--- a/llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
+++ b/llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
@@ -94,7 +94,7 @@ class X86InstructionSelector : public InstructionSelector {
bool selectCmp(MachineInstr &I, MachineRegisterInfo &MRI,
MachineFunction &MF) const;
bool selectFCmp(MachineInstr &I, MachineRegisterInfo &MRI,
- MachineFunction &MF) const;
+ MachineFunction &MF) const;
bool selectUAddSub(MachineInstr &I, MachineRegisterInfo &MRI,
MachineFunction &MF) const;
bool selectDebugInstr(MachineInstr &I, MachineRegisterInfo &MRI) const;
>From 5bf87521b07b777eec140a6c17a55ab2b1cfbfa4 Mon Sep 17 00:00:00 2001
From: mattarde <mattarde at intel.com>
Date: Tue, 3 Jun 2025 00:25:45 -0700
Subject: [PATCH 7/7] add x87 specific runs
---
.../lib/Target/X86/GISel/X86LegalizerInfo.cpp | 41 ++++++++++-
llvm/lib/Target/X86/GISel/X86LegalizerInfo.h | 3 +
llvm/test/CodeGen/X86/isel-fabs-x87.ll | 32 +++------
llvm/test/CodeGen/X86/isel-fabs.ll | 69 +++++++++----------
4 files changed, 85 insertions(+), 60 deletions(-)
diff --git a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
index e3635218f1d2d..2ebdb6fbdbaea 100644
--- a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
+++ b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
@@ -468,7 +468,7 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
getActionDefinitionsBuilder(G_FABS)
.legalFor(UseX87 && !HasSSE2, {s32, s64, s80})
- .lower();
+ .custom();
// fp comparison
getActionDefinitionsBuilder(G_FCMP)
@@ -675,6 +675,8 @@ bool X86LegalizerInfo::legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI,
return legalizeUITOFP(MI, MRI, Helper);
case TargetOpcode::G_STORE:
return legalizeNarrowingStore(MI, MRI, Helper);
+ case TargetOpcode::G_FABS:
+ return legalizeFAbs(MI, MRI, Helper);
}
llvm_unreachable("expected switch to return");
}
@@ -785,6 +787,43 @@ bool X86LegalizerInfo::legalizeNarrowingStore(MachineInstr &MI,
return true;
}
+bool X86LegalizerInfo::legalizeFAbs(MachineInstr &MI,
+ MachineRegisterInfo &MRI,
+ LegalizerHelper &Helper) const {
+
+ MachineIRBuilder &MIRBuilder = Helper.MIRBuilder;
+ Register SrcReg = MI.getOperand(1).getReg();
+ Register DstReg = MI.getOperand(0).getReg();
+ LLT Ty = MRI.getType(DstReg);
+ if (Subtarget.is32Bit()) {
+ // Reset sign bit
+ MIRBuilder.buildAnd(
+ DstReg, SrcReg,
+ MIRBuilder.buildConstant(
+ Ty, APInt::getSignedMaxValue(Ty.getScalarSizeInBits())));
+ } else {
+ // In 64 bit mode, constant pool is used.
+ auto &MF = MIRBuilder.getMF();
+ Type *IRTy = getTypeForLLT(Ty, MF.getFunction().getContext());
+ Constant *ConstMask = ConstantInt::get(
+ IRTy, APInt::getSignedMaxValue(Ty.getScalarSizeInBits()));
+ LLT DstTy = MRI.getType(DstReg);
+ const DataLayout &DL = MIRBuilder.getDataLayout();
+ unsigned AddrSpace = DL.getDefaultGlobalsAddressSpace();
+ Align Alignment(DL.getABITypeAlign(
+ getTypeForLLT(DstTy, MF.getFunction().getContext())));
+ auto Addr = MIRBuilder.buildConstantPool(
+ LLT::pointer(AddrSpace, DL.getPointerSizeInBits(AddrSpace)),
+ MF.getConstantPool()->getConstantPoolIndex(ConstMask, Alignment));
+ MachineMemOperand *MMO =
+ MF.getMachineMemOperand(MachinePointerInfo::getConstantPool(MF),
+ MachineMemOperand::MOLoad, DstTy, Alignment);
+ auto LoadedMask = MIRBuilder.buildLoad(DstTy, Addr, *MMO);
+ MIRBuilder.buildAnd(DstReg, SrcReg, LoadedMask);
+ }
+ MI.eraseFromParent();
+ return true;
+}
bool X86LegalizerInfo::legalizeIntrinsic(LegalizerHelper &Helper,
MachineInstr &MI) const {
return true;
diff --git a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.h b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.h
index 54f776456397b..55933f29664d7 100644
--- a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.h
+++ b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.h
@@ -48,6 +48,9 @@ class X86LegalizerInfo : public LegalizerInfo {
bool legalizeNarrowingStore(MachineInstr &MI, MachineRegisterInfo &MRI,
LegalizerHelper &Helper) const;
+
+ bool legalizeFAbs(MachineInstr &MI, MachineRegisterInfo &MRI,
+ LegalizerHelper &Helper) const;
};
} // namespace llvm
#endif
diff --git a/llvm/test/CodeGen/X86/isel-fabs-x87.ll b/llvm/test/CodeGen/X86/isel-fabs-x87.ll
index 6d2ef980a6a32..e9863ef7a93e1 100644
--- a/llvm/test/CodeGen/X86/isel-fabs-x87.ll
+++ b/llvm/test/CodeGen/X86/isel-fabs-x87.ll
@@ -1,23 +1,17 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=SDAG-X64
-; RUN: llc < %s -mtriple=x86_64-- -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=FASTISEL-X64
-; RUN: llc < %s -mtriple=x86_64-- -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
-; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse | FileCheck %s --check-prefixes=X86,SDAG-X86
-; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X86,FASTISEL-X86
-; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86,GISEL-X86
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+x87,-sse2,-sse | FileCheck %s --check-prefixes=X64
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+x87,-sse2,-sse -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X64
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+x87,-sse2,-sse -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X64
+; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse | FileCheck %s --check-prefixes=X86
+; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X86
+; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86
define x86_fp80 @test_x86_fp80_abs(x86_fp80 %arg) {
-; SDAG-X64-LABEL: test_x86_fp80_abs:
-; SDAG-X64: # %bb.0:
-; SDAG-X64-NEXT: fldt {{[0-9]+}}(%rsp)
-; SDAG-X64-NEXT: fabs
-; SDAG-X64-NEXT: retq
-;
-; FASTISEL-X64-LABEL: test_x86_fp80_abs:
-; FASTISEL-X64: # %bb.0:
-; FASTISEL-X64-NEXT: fldt {{[0-9]+}}(%rsp)
-; FASTISEL-X64-NEXT: fabs
-; FASTISEL-X64-NEXT: retq
+; X64-LABEL: test_x86_fp80_abs:
+; X64: # %bb.0:
+; X64-NEXT: fldt {{[0-9]+}}(%rsp)
+; X64-NEXT: fabs
+; X64-NEXT: retq
;
; X86-LABEL: test_x86_fp80_abs:
; X86: # %bb.0:
@@ -27,7 +21,3 @@ define x86_fp80 @test_x86_fp80_abs(x86_fp80 %arg) {
%abs = tail call x86_fp80 @llvm.fabs.f80(x86_fp80 %arg)
ret x86_fp80 %abs
}
-;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
-; FASTISEL-X86: {{.*}}
-; GISEL-X86: {{.*}}
-; SDAG-X86: {{.*}}
diff --git a/llvm/test/CodeGen/X86/isel-fabs.ll b/llvm/test/CodeGen/X86/isel-fabs.ll
index 9e9e57ae80df4..66a632697b472 100644
--- a/llvm/test/CodeGen/X86/isel-fabs.ll
+++ b/llvm/test/CodeGen/X86/isel-fabs.ll
@@ -1,34 +1,29 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=SDAG-X64
-; RUN: llc < %s -mtriple=x86_64-- -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=FASTISEL-X64
-; RUN: llc < %s -mtriple=x86_64-- -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
-; RUN: llc < %s -mtriple=i686-- -mattr=-x87 | FileCheck %s --check-prefixes=SDAG-X86
+; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87 | FileCheck %s --check-prefixes=X64
+; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X64,FASTISEL-X64
+; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87 -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
+; RUN: llc < %s -mtriple=i686-- -mattr=-x87 | FileCheck %s --check-prefixes=X86
; RUN: llc < %s -mtriple=i686-- -mattr=-x87 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=FASTISEL-X86
; RUN: llc < %s -mtriple=i686-- -mattr=-x87 -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86
define float @test_float_abs(float %arg) {
-; SDAG-X64-LABEL: test_float_abs:
-; SDAG-X64: # %bb.0:
-; SDAG-X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
-; SDAG-X64-NEXT: retq
-;
-; FASTISEL-X64-LABEL: test_float_abs:
-; FASTISEL-X64: # %bb.0:
-; FASTISEL-X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
-; FASTISEL-X64-NEXT: retq
+; X64-LABEL: test_float_abs:
+; X64: # %bb.0:
+; X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
+; X64-NEXT: retq
;
; GISEL-X64-LABEL: test_float_abs:
; GISEL-X64: # %bb.0:
; GISEL-X64-NEXT: movd %xmm0, %eax
-; GISEL-X64-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; GISEL-X64-NEXT: andl {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %eax
; GISEL-X64-NEXT: movd %eax, %xmm0
; GISEL-X64-NEXT: retq
;
-; SDAG-X86-LABEL: test_float_abs:
-; SDAG-X86: # %bb.0:
-; SDAG-X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
-; SDAG-X86-NEXT: andl {{[0-9]+}}(%esp), %eax
-; SDAG-X86-NEXT: retl
+; X86-LABEL: test_float_abs:
+; X86: # %bb.0:
+; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: retl
;
; FASTISEL-X86-LABEL: test_float_abs:
; FASTISEL-X86: # %bb.0:
@@ -46,30 +41,24 @@ define float @test_float_abs(float %arg) {
}
define double @test_double_abs(double %arg) {
-; SDAG-X64-LABEL: test_double_abs:
-; SDAG-X64: # %bb.0:
-; SDAG-X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
-; SDAG-X64-NEXT: retq
-;
-; FASTISEL-X64-LABEL: test_double_abs:
-; FASTISEL-X64: # %bb.0:
-; FASTISEL-X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
-; FASTISEL-X64-NEXT: retq
+; X64-LABEL: test_double_abs:
+; X64: # %bb.0:
+; X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
+; X64-NEXT: retq
;
; GISEL-X64-LABEL: test_double_abs:
; GISEL-X64: # %bb.0:
-; GISEL-X64-NEXT: movabsq $9223372036854775807, %rax # imm = 0x7FFFFFFFFFFFFFFF
-; GISEL-X64-NEXT: movq %xmm0, %rcx
-; GISEL-X64-NEXT: andq %rax, %rcx
-; GISEL-X64-NEXT: movq %rcx, %xmm0
+; GISEL-X64-NEXT: movq %xmm0, %rax
+; GISEL-X64-NEXT: andq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax
+; GISEL-X64-NEXT: movq %rax, %xmm0
; GISEL-X64-NEXT: retq
;
-; SDAG-X86-LABEL: test_double_abs:
-; SDAG-X86: # %bb.0:
-; SDAG-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; SDAG-X86-NEXT: movl $2147483647, %edx # imm = 0x7FFFFFFF
-; SDAG-X86-NEXT: andl {{[0-9]+}}(%esp), %edx
-; SDAG-X86-NEXT: retl
+; X86-LABEL: test_double_abs:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl $2147483647, %edx # imm = 0x7FFFFFFF
+; X86-NEXT: andl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: retl
;
; FASTISEL-X86-LABEL: test_double_abs:
; FASTISEL-X86: # %bb.0:
@@ -85,6 +74,10 @@ define double @test_double_abs(double %arg) {
; GISEL-X86-NEXT: andl {{[0-9]+}}(%esp), %eax
; GISEL-X86-NEXT: andl {{[0-9]+}}(%esp), %edx
; GISEL-X86-NEXT: retl
+
%abs = tail call double @llvm.fabs.f64(double %arg)
ret double %abs
}
+
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; FASTISEL-X64: {{.*}}
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