[llvm] [llvm-exegesis] [AArch64] Resolving "not all operands are initialized by snippet generator" (PR #142529)
Lakshay Kumar via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 2 22:47:32 PDT 2025
https://github.com/lakshayk-nv created https://github.com/llvm/llvm-project/pull/142529
Implementing `randomizeTargetMCOperand()` for AArch64 that omitting `OPERAND_UNKNOWN` and `OPERAND_PCREL` to an immediate value based on opcode.
>From b1919dde1492495ed8bf53d852deabc3808c41df Mon Sep 17 00:00:00 2001
From: lakshayk-nv <lakshayk at nvidia.com>
Date: Fri, 30 May 2025 06:43:53 -0700
Subject: [PATCH 1/6] [llvm-exegesis] [AArch64] Resolve " Not all operands were
initialized by the snippet generator" by omit OPERAND_UNKNOWN to Immediate
---
.../llvm-exegesis/lib/AArch64/Target.cpp | 22 +++++++++++++++++++
.../llvm-exegesis/lib/SnippetGenerator.cpp | 6 +++++
2 files changed, 28 insertions(+)
diff --git a/llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp b/llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
index a1eb5a46f21fc..d768673944bd4 100644
--- a/llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
+++ b/llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
@@ -162,6 +162,10 @@ class ExegesisAArch64Target : public ExegesisTarget {
ExegesisAArch64Target()
: ExegesisTarget(AArch64CpuPfmCounters, AArch64_MC::isOpcodeAvailable) {}
+ Error randomizeTargetMCOperand(
+ const Instruction &Instr, const Variable &Var, MCOperand &AssignedValue,
+ const BitVector &ForbiddenRegs) const override;
+
private:
std::vector<MCInst> setRegTo(const MCSubtargetInfo &STI, MCRegister Reg,
const APInt &Value) const override {
@@ -229,6 +233,24 @@ class ExegesisAArch64Target : public ExegesisTarget {
}
};
+Error ExegesisAArch64Target::randomizeTargetMCOperand(
+ const Instruction &Instr, const Variable &Var, MCOperand &AssignedValue,
+ const BitVector &ForbiddenRegs) const {
+ unsigned Opcode = Instr.getOpcode();
+ switch (Opcode) {
+ case AArch64::MOVIv2s_msl:
+ case AArch64::MOVIv4s_msl:
+ case AArch64::MVNIv2s_msl:
+ case AArch64::MVNIv4s_msl:
+ AssignedValue = MCOperand::createImm(8); // or 16, as needed
+ break;
+ default:
+ AssignedValue = MCOperand::createImm(0);
+ break;
+ }
+ return Error::success();
+}
+
} // namespace
static ExegesisTarget *getTheExegesisAArch64Target() {
diff --git a/llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp b/llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp
index 04064ae1d8441..de2bc4d54d1d5 100644
--- a/llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp
+++ b/llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp
@@ -276,6 +276,12 @@ static Error randomizeMCOperand(const LLVMState &State,
AssignedValue = MCOperand::createReg(randomBit(AllowedRegs));
break;
}
+ /// Omit unknown operands to default immediate value based on the instruction
+#ifdef __aarch64__
+ case MCOI::OperandType::OPERAND_UNKNOWN:
+ return State.getExegesisTarget().randomizeTargetMCOperand(
+ Instr, Var, AssignedValue, ForbiddenRegs);
+#endif
default:
break;
}
>From af68e0ff850d0ff5b2a8e517145a99421cd6fb9e Mon Sep 17 00:00:00 2001
From: lakshayk-nv <lakshayk at nvidia.com>
Date: Sun, 1 Jun 2025 11:52:13 -0700
Subject: [PATCH 2/6] [llvm-exegesis] [AArch64] Include OPERAND_PCREL operand
handling in snippet generation, omiting immediate valued 0.
---
.../llvm-exegesis/lib/AArch64/Target.cpp | 32 ++++++++++++-------
.../llvm-exegesis/lib/SnippetGenerator.cpp | 4 ++-
2 files changed, 24 insertions(+), 12 deletions(-)
diff --git a/llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp b/llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
index d768673944bd4..4e8150ae79ee8 100644
--- a/llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
+++ b/llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
@@ -236,19 +236,29 @@ class ExegesisAArch64Target : public ExegesisTarget {
Error ExegesisAArch64Target::randomizeTargetMCOperand(
const Instruction &Instr, const Variable &Var, MCOperand &AssignedValue,
const BitVector &ForbiddenRegs) const {
- unsigned Opcode = Instr.getOpcode();
- switch (Opcode) {
- case AArch64::MOVIv2s_msl:
- case AArch64::MOVIv4s_msl:
- case AArch64::MVNIv2s_msl:
- case AArch64::MVNIv4s_msl:
- AssignedValue = MCOperand::createImm(8); // or 16, as needed
- break;
- default:
+ const Operand &Op = Instr.getPrimaryOperand(Var);
+ switch (Op.getExplicitOperandInfo().OperandType) {
+ case MCOI::OperandType::OPERAND_UNKNOWN: {
+ unsigned Opcode = Instr.getOpcode();
+ switch (Opcode) {
+ case AArch64::MOVIv2s_msl:
+ case AArch64::MOVIv4s_msl:
+ case AArch64::MVNIv2s_msl:
+ case AArch64::MVNIv4s_msl:
+ AssignedValue = MCOperand::createImm(8); // or 16, as needed
+ break;
+ default:
+ AssignedValue = MCOperand::createImm(0);
+ break;
+ }
+ return Error::success();
+ }
+ case MCOI::OperandType::OPERAND_PCREL:
AssignedValue = MCOperand::createImm(0);
- break;
+ return Error::success();
+ default:
+ llvm_unreachable("Unexpected operand type in randomizeTargetMCOperand");
}
- return Error::success();
}
} // namespace
diff --git a/llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp b/llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp
index de2bc4d54d1d5..fef2c0f6077dc 100644
--- a/llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp
+++ b/llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp
@@ -276,9 +276,11 @@ static Error randomizeMCOperand(const LLVMState &State,
AssignedValue = MCOperand::createReg(randomBit(AllowedRegs));
break;
}
- /// Omit unknown operands to default immediate value based on the instruction
+ /// Omit unknown and pc-relative operands to imm value based on the instruction
+ // TODO: Is aarch64 gaurd neccessary ?
#ifdef __aarch64__
case MCOI::OperandType::OPERAND_UNKNOWN:
+ case MCOI::OperandType::OPERAND_PCREL:
return State.getExegesisTarget().randomizeTargetMCOperand(
Instr, Var, AssignedValue, ForbiddenRegs);
#endif
>From 5697760a959d24cd83a43830ebcb0365b9cae730 Mon Sep 17 00:00:00 2001
From: lakshayk-nv <lakshayk at nvidia.com>
Date: Sun, 1 Jun 2025 23:00:27 -0700
Subject: [PATCH 3/6] [llvm-exegesis] [AArch64] WIP. Introduce handling for
OPERAND_FIRST_TARGET.
---
llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp | 3 +++
1 file changed, 3 insertions(+)
diff --git a/llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp b/llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
index 4e8150ae79ee8..c152122171949 100644
--- a/llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
+++ b/llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
@@ -256,6 +256,9 @@ Error ExegesisAArch64Target::randomizeTargetMCOperand(
case MCOI::OperandType::OPERAND_PCREL:
AssignedValue = MCOperand::createImm(0);
return Error::success();
+ case MCOI::OperandType::OPERAND_FIRST_TARGET:
+ AssignedValue = MCOperand::createImm(0);
+ return Error::success();
default:
llvm_unreachable("Unexpected operand type in randomizeTargetMCOperand");
}
>From 75c2e65b11f90528914f9938bbf49dbd033567c4 Mon Sep 17 00:00:00 2001
From: lakshayk-nv <lakshayk at nvidia.com>
Date: Sun, 1 Jun 2025 23:01:28 -0700
Subject: [PATCH 4/6] [llvm-exegesis] [AArch64] Explore opcode-specific
immediate values for omitted opcode type.
---
llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp | 2 ++
1 file changed, 2 insertions(+)
diff --git a/llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp b/llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
index c152122171949..38c3bafb88952 100644
--- a/llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
+++ b/llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
@@ -237,6 +237,8 @@ Error ExegesisAArch64Target::randomizeTargetMCOperand(
const Instruction &Instr, const Variable &Var, MCOperand &AssignedValue,
const BitVector &ForbiddenRegs) const {
const Operand &Op = Instr.getPrimaryOperand(Var);
+ // Introducing some illegal instructions for (15) a few opcodes
+ // TODO: Look into immediate values to be opcode specific
switch (Op.getExplicitOperandInfo().OperandType) {
case MCOI::OperandType::OPERAND_UNKNOWN: {
unsigned Opcode = Instr.getOpcode();
>From 9d425dc4f9f8053b7b969c0f35395a8905273155 Mon Sep 17 00:00:00 2001
From: lakshayk-nv <lakshayk at nvidia.com>
Date: Mon, 2 Jun 2025 03:06:06 -0700
Subject: [PATCH 5/6] [llvm-exegesis] [AArch64] Refactor operand handling in
randomizeTargetMCOperand.
---
.../llvm-exegesis/lib/AArch64/Target.cpp | 46 ++++++++++---------
1 file changed, 24 insertions(+), 22 deletions(-)
diff --git a/llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp b/llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
index 38c3bafb88952..8fc5feded832b 100644
--- a/llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
+++ b/llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
@@ -237,33 +237,35 @@ Error ExegesisAArch64Target::randomizeTargetMCOperand(
const Instruction &Instr, const Variable &Var, MCOperand &AssignedValue,
const BitVector &ForbiddenRegs) const {
const Operand &Op = Instr.getPrimaryOperand(Var);
+ const auto OperandType = Op.getExplicitOperandInfo().OperandType;
// Introducing some illegal instructions for (15) a few opcodes
// TODO: Look into immediate values to be opcode specific
- switch (Op.getExplicitOperandInfo().OperandType) {
- case MCOI::OperandType::OPERAND_UNKNOWN: {
- unsigned Opcode = Instr.getOpcode();
- switch (Opcode) {
- case AArch64::MOVIv2s_msl:
- case AArch64::MOVIv4s_msl:
- case AArch64::MVNIv2s_msl:
- case AArch64::MVNIv4s_msl:
- AssignedValue = MCOperand::createImm(8); // or 16, as needed
- break;
- default:
+ switch (OperandType) {
+ case MCOI::OperandType::OPERAND_UNKNOWN: {
+ unsigned Opcode = Instr.getOpcode();
+ switch (Opcode) {
+ case AArch64::MOVIv2s_msl:
+ case AArch64::MOVIv4s_msl:
+ case AArch64::MVNIv2s_msl:
+ case AArch64::MVNIv4s_msl:
+ AssignedValue = MCOperand::createImm(8); // or 16, as needed
+ return Error::success();
+ default:
+ AssignedValue = MCOperand::createImm(0);
+ return Error::success();
+ }
+ }
+ case MCOI::OperandType::OPERAND_PCREL:
+ case MCOI::OperandType::OPERAND_FIRST_TARGET:
AssignedValue = MCOperand::createImm(0);
+ return Error::success();
+ default:
break;
- }
- return Error::success();
- }
- case MCOI::OperandType::OPERAND_PCREL:
- AssignedValue = MCOperand::createImm(0);
- return Error::success();
- case MCOI::OperandType::OPERAND_FIRST_TARGET:
- AssignedValue = MCOperand::createImm(0);
- return Error::success();
- default:
- llvm_unreachable("Unexpected operand type in randomizeTargetMCOperand");
}
+
+ return make_error<Failure>(
+ Twine("Unimplemented operand type: MCOI::OperandType:")
+ .concat(Twine(static_cast<int>(OperandType))));
}
} // namespace
>From 9a1feb2d99b4dc9bd5cea7f6ea117bb21d3d72bb Mon Sep 17 00:00:00 2001
From: lakshayk-nv <lakshayk at nvidia.com>
Date: Mon, 2 Jun 2025 22:28:44 -0700
Subject: [PATCH 6/6] [llvm-exegesis] [AArch64] Update comments for operand
handling and remove out of scope operand type.
---
llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp | 1 -
llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp | 2 +-
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp b/llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
index 8fc5feded832b..285d888770a53 100644
--- a/llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
+++ b/llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
@@ -256,7 +256,6 @@ Error ExegesisAArch64Target::randomizeTargetMCOperand(
}
}
case MCOI::OperandType::OPERAND_PCREL:
- case MCOI::OperandType::OPERAND_FIRST_TARGET:
AssignedValue = MCOperand::createImm(0);
return Error::success();
default:
diff --git a/llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp b/llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp
index fef2c0f6077dc..d4381c3b123f0 100644
--- a/llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp
+++ b/llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp
@@ -277,7 +277,7 @@ static Error randomizeMCOperand(const LLVMState &State,
break;
}
/// Omit unknown and pc-relative operands to imm value based on the instruction
- // TODO: Is aarch64 gaurd neccessary ?
+ // TODO: Neccesity of AArch64 guard ?
#ifdef __aarch64__
case MCOI::OperandType::OPERAND_UNKNOWN:
case MCOI::OperandType::OPERAND_PCREL:
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