[llvm] [AMDGPU] Extend wave reduce intrinsics for i32 type (PR #126469)

[Juan Manuel Martinez Caamaño via llvm-commits]

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@@ -2327,8 +2327,14 @@ class AMDGPUWaveReduce<LLVMType data_ty = llvm_anyint_ty> : Intrinsic<
     ],
     [IntrNoMem, IntrConvergent, IntrWillReturn, IntrNoCallback, IntrNoFree, ImmArg<ArgIndex<1>>]>;
 
-def int_amdgcn_wave_reduce_umin : AMDGPUWaveReduce;
-def int_amdgcn_wave_reduce_umax : AMDGPUWaveReduce;
+multiclass AMDGPUWaveReduceOps<list<string> Operations> {
+  foreach Op = Operations in { def Op : AMDGPUWaveReduce; }
+}
+
+defvar Operations = [
+  "umin", "min", "umax", "max", "uadd", "add", "usub", "sub", "and", "or", "xor"
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jmmartinez wrote:

Why do we have to distinguish between sub/usub and add/uadd. The generated code seems to be the same.

Am I missing something?

https://github.com/llvm/llvm-project/pull/126469