[llvm] [DAG] canCreateUndefOrPoison – mark fneg/fadd/fsub/fmul/fdiv/frem as not poison generating (PR #142345)

Nikita Popov via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 2 01:22:49 PDT 2025


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@@ -0,0 +1,282 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck %s -check-prefix GFX11
+define float @freeze_fadd(float %input) nounwind {
+; GFX11-LABEL: freeze_fadd:
+; GFX11:       ; %bb.0: ; %entry
+; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT:    v_add_f32_e32 v0, 2.0, v0
+; GFX11-NEXT:    s_setpc_b64 s[30:31]
+entry:
+  %x = fadd reassoc nsz arcp contract afn float %input, 1.000000e+00
+  %y = freeze float %x
+  %z = fadd reassoc nsz arcp contract afn float %y, 1.000000e+00
+  ret float %z
+}
+
+define float @freeze_fadd_nnan(float %input) nounwind {
+; GFX11-LABEL: freeze_fadd_nnan:
+; GFX11:       ; %bb.0: ; %entry
+; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT:    v_add_f32_e32 v0, 1.0, v0
+; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT:    v_add_f32_e32 v0, 1.0, v0
+; GFX11-NEXT:    s_setpc_b64 s[30:31]
+entry:
+  %x = fadd nnan contract float %input, 1.000000e+00
+  %y = freeze float %x
+  %z = fadd nnan contract float %y, 1.000000e+00
----------------
nikic wrote:

Should also have reassoc? I think otherwise the transform would not happen even if nnan was missing, so the test doesn't quite should what you want.

https://github.com/llvm/llvm-project/pull/142345


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