[llvm] Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set (PR #142289)
via llvm-commits
llvm-commits at lists.llvm.org
Sat May 31 14:09:14 PDT 2025
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-arm
Author: Fangrui Song (MaskRay)
<details>
<summary>Changes</summary>
Introduce MCAsmInfo::UsesSetToEquateSymbol to control the preferred
syntax for symbol equating. We now favor the more readable and common
`symbol = expression` syntax over `.set`. This aligns with pre-D44256 behavior.
On Apple platforms, this resolves a clang -S vs -c behavior difference (resolves #<!-- -->104623).
For targets whose = support is unconfirmed, UsesSetToEquateSymbol is set to false.
This also minimizes test updates.
---
Patch is 58.01 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/142289.diff
67 Files Affected:
- (modified) llvm/include/llvm/MC/MCAsmInfo.h (+4)
- (modified) llvm/lib/MC/MCAsmStreamer.cpp (+4-2)
- (modified) llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp (+1)
- (modified) llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCAsmInfo.cpp (+1)
- (modified) llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp (+2)
- (modified) llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp (+1)
- (modified) llvm/test/CodeGen/AArch64/arm64ec-alias.ll (+7-7)
- (modified) llvm/test/CodeGen/AArch64/arm64ec-hybrid-patchable.ll (+9-9)
- (modified) llvm/test/CodeGen/AArch64/arm64ec-symbols.ll (+3-3)
- (modified) llvm/test/CodeGen/AArch64/arm64ec-varargs.ll (+8-8)
- (modified) llvm/test/CodeGen/AArch64/ehcontguard.ll (+1-1)
- (modified) llvm/test/CodeGen/AArch64/global-merge-1.ll (+4-4)
- (modified) llvm/test/CodeGen/AArch64/global-merge-2.ll (+6-6)
- (modified) llvm/test/CodeGen/AArch64/global-merge-3.ll (+5-5)
- (modified) llvm/test/CodeGen/AArch64/global-merge-hidden-minsize.ll (+2-2)
- (modified) llvm/test/CodeGen/AArch64/ifunc-asm.ll (+1-1)
- (modified) llvm/test/CodeGen/AArch64/seh-finally.ll (+4-4)
- (modified) llvm/test/CodeGen/AArch64/stackguard-internal.ll (+1-1)
- (modified) llvm/test/CodeGen/ARM/alias_store.ll (+1-1)
- (modified) llvm/test/CodeGen/ARM/aliases.ll (+7-7)
- (modified) llvm/test/CodeGen/ARM/global-merge-dllexport.ll (+2-2)
- (modified) llvm/test/CodeGen/ARM/global-merge-external-2.ll (+6-6)
- (modified) llvm/test/CodeGen/ARM/global-merge-external.ll (+6-6)
- (modified) llvm/test/CodeGen/AVR/global-aliases.ll (+14-14)
- (modified) llvm/test/CodeGen/Mips/hf16call32_body.ll (+12-12)
- (modified) llvm/test/CodeGen/Mips/mips16ex.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/asm-printer-topological-order.ll (+3-3)
- (modified) llvm/test/CodeGen/PowerPC/data-align.ll (+5-5)
- (modified) llvm/test/CodeGen/WebAssembly/aliases.ll (+11-11)
- (modified) llvm/test/CodeGen/WinCFGuard/cfguard-mingw.ll (+1-1)
- (modified) llvm/test/CodeGen/WinCFGuard/cfguard.ll (+1-1)
- (modified) llvm/test/CodeGen/X86/2007-09-06-ExtWeakAliasee.ll (+1-1)
- (modified) llvm/test/CodeGen/X86/2009-08-12-badswitch.ll (+25-25)
- (modified) llvm/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll (+4-4)
- (modified) llvm/test/CodeGen/X86/alias-gep.ll (+4-4)
- (modified) llvm/test/CodeGen/X86/aliases.ll (+4-4)
- (modified) llvm/test/CodeGen/X86/catchret-empty-fallthrough.ll (+1-1)
- (modified) llvm/test/CodeGen/X86/coff-alias-type.ll (+1-1)
- (modified) llvm/test/CodeGen/X86/coff-comdat.ll (+1-1)
- (modified) llvm/test/CodeGen/X86/coff-feat00.ll (+1-1)
- (modified) llvm/test/CodeGen/X86/dllexport-x86_64.ll (+5-5)
- (modified) llvm/test/CodeGen/X86/dllexport.ll (+4-4)
- (modified) llvm/test/CodeGen/X86/ehcontguard.ll (+1-1)
- (modified) llvm/test/CodeGen/X86/fastcall-correct-mangling.ll (+2-2)
- (modified) llvm/test/CodeGen/X86/ifunc-asm.ll (+1-1)
- (modified) llvm/test/CodeGen/X86/lea-opt-memop-check-1.ll (+3-3)
- (modified) llvm/test/CodeGen/X86/linux-preemption.ll (+8-8)
- (modified) llvm/test/CodeGen/X86/localescape.ll (+8-8)
- (modified) llvm/test/CodeGen/X86/pr22019.ll (+4-4)
- (modified) llvm/test/CodeGen/X86/seh-catch-all-win32.ll (+2-2)
- (modified) llvm/test/CodeGen/X86/seh-catchpad.ll (+1-1)
- (modified) llvm/test/CodeGen/X86/seh-finally.ll (+1-1)
- (modified) llvm/test/CodeGen/X86/seh-no-invokes.ll (+1-1)
- (modified) llvm/test/CodeGen/X86/seh-stack-realign.ll (+2-2)
- (modified) llvm/test/CodeGen/X86/tailcall-cgp-dup.ll (+6-6)
- (modified) llvm/test/CodeGen/X86/windows-seh-EHa-TryInFinally.ll (+1-1)
- (modified) llvm/test/CodeGen/XCore/globals.ll (+1-1)
- (modified) llvm/test/CodeGen/XCore/linkage.ll (+2-2)
- (modified) llvm/test/MC/AArch64/basic-a64-instructions.s (+1-1)
- (modified) llvm/test/MC/AsmParser/assignment.s (+6-6)
- (modified) llvm/test/MC/AsmParser/directive_include.s (+1-1)
- (modified) llvm/test/MC/AsmParser/directive_set.s (+3-3)
- (modified) llvm/test/MC/AsmParser/include.ll (+2-2)
- (modified) llvm/test/MC/AsmParser/labels.s (+3-3)
- (modified) llvm/test/MC/AsmParser/macro-arg-darwin.s (+2-2)
- (modified) llvm/test/MC/AsmParser/motorola_integers.s (+8-8)
- (modified) llvm/test/MC/Mips/cpsetup.s (+1-1)
``````````diff
diff --git a/llvm/include/llvm/MC/MCAsmInfo.h b/llvm/include/llvm/MC/MCAsmInfo.h
index 3a31957f2f6be..f656f364981d2 100644
--- a/llvm/include/llvm/MC/MCAsmInfo.h
+++ b/llvm/include/llvm/MC/MCAsmInfo.h
@@ -140,6 +140,9 @@ class MCAsmInfo {
/// This is appended to emitted labels. Defaults to ":"
const char *LabelSuffix;
+ /// Use .set instead of = to equate a symbol to an expression.
+ bool UsesSetToEquateSymbol = false;
+
// Print the EH begin symbol with an assignment. Defaults to false.
bool UseAssignmentForEHBegin = false;
@@ -520,6 +523,7 @@ class MCAsmInfo {
bool shouldAllowAdditionalComments() const { return AllowAdditionalComments; }
const char *getLabelSuffix() const { return LabelSuffix; }
+ bool usesSetToEquateSymbol() const { return UsesSetToEquateSymbol; }
bool useAssignmentForEHBegin() const { return UseAssignmentForEHBegin; }
bool needsLocalForSize() const { return NeedsLocalForSize; }
StringRef getPrivateGlobalPrefix() const { return PrivateGlobalPrefix; }
diff --git a/llvm/lib/MC/MCAsmStreamer.cpp b/llvm/lib/MC/MCAsmStreamer.cpp
index da0d99e70d9ea..4380f74318e7b 100644
--- a/llvm/lib/MC/MCAsmStreamer.cpp
+++ b/llvm/lib/MC/MCAsmStreamer.cpp
@@ -695,9 +695,11 @@ void MCAsmStreamer::emitAssignment(MCSymbol *Symbol, const MCExpr *Value) {
if (E->inlineAssignedExpr())
EmitSet = false;
if (EmitSet) {
- OS << ".set ";
+ bool UseSet = MAI->usesSetToEquateSymbol();
+ if (UseSet)
+ OS << ".set ";
Symbol->print(OS, MAI);
- OS << ", ";
+ OS << (UseSet ? ", " : " = ");
Value->print(OS, MAI);
EmitEOL();
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
index 6f1d89e500ed3..fcf134aa8658f 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
@@ -42,6 +42,7 @@ AMDGPUMCAsmInfo::AMDGPUMCAsmInfo(const Triple &TT,
CommentString = ";";
InlineAsmStart = ";#ASMSTART";
InlineAsmEnd = ";#ASMEND";
+ UsesSetToEquateSymbol = true;
//===--- Data Emission Directives -------------------------------------===//
UsesELFSectionDirectiveForBSS = true;
diff --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCAsmInfo.cpp b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCAsmInfo.cpp
index 7675b05f106a0..ba8faaeb74a07 100644
--- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCAsmInfo.cpp
+++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCAsmInfo.cpp
@@ -38,6 +38,7 @@ HexagonMCAsmInfo::HexagonMCAsmInfo(const Triple &TT) {
LCOMMDirectiveAlignmentType = LCOMM::ByteAlignment;
InlineAsmStart = "# InlineAsm Start";
InlineAsmEnd = "# InlineAsm End";
+ UsesSetToEquateSymbol = true;
ZeroDirective = "\t.space\t";
AscizDirective = "\t.string\t";
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
index 160ee07fad5cc..b5be23c5a96ad 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
@@ -155,5 +155,7 @@ PPCXCOFFMCAsmInfo::PPCXCOFFMCAsmInfo(bool Is64Bit, const Triple &T) {
// Support $ as PC in inline asm
DollarIsPC = true;
+ UsesSetToEquateSymbol = true;
+
initializeVariantKinds(variantKindDescs);
}
diff --git a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
index 27272cdbbd230..e9d387399bf30 100644
--- a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
+++ b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
@@ -49,6 +49,7 @@ SystemZMCAsmInfoGOFF::SystemZMCAsmInfoGOFF(const Triple &TT) {
CalleeSaveStackSlotSize = 8;
CodePointerSize = 8;
CommentString = "*";
+ UsesSetToEquateSymbol = true;
ExceptionsType = ExceptionHandling::ZOS;
IsHLASM = true;
IsLittleEndian = false;
diff --git a/llvm/test/CodeGen/AArch64/arm64ec-alias.ll b/llvm/test/CodeGen/AArch64/arm64ec-alias.ll
index 03cc873136940..18023a95a5d20 100644
--- a/llvm/test/CodeGen/AArch64/arm64ec-alias.ll
+++ b/llvm/test/CodeGen/AArch64/arm64ec-alias.ll
@@ -13,30 +13,30 @@ define dso_local void @patchable_func() hybrid_patchable {
@patchable_alias = alias void (), ptr @patchable_func
; CHECK: .weak_anti_dep func_alias
-; CHECK-NEXT: .set func_alias, "#func_alias"
+; CHECK-NEXT: func_alias = "#func_alias"
; CHECK-NEXT: .weak_anti_dep func_alias2
-; CHECK-NEXT: .set func_alias2, "#func_alias2"
+; CHECK-NEXT: func_alias2 = "#func_alias2"
; CHECK-NEXT: .weak_anti_dep func
-; CHECK-NEXT: .set func, "#func"
+; CHECK-NEXT: func = "#func"
; CHECK: .weak_anti_dep patchable_alias
-; CHECK-NEXT: .set patchable_alias, "#patchable_alias"
+; CHECK-NEXT: patchable_alias = "#patchable_alias"
; CHECK: .globl "#func_alias"
; CHECK-NEXT: .def "#func_alias";
; CHECK-NEXT: .scl 2;
; CHECK-NEXT: .type 32;
; CHECK-NEXT: .endef
-; CHECK-NEXT: .set "#func_alias", "#func"
+; CHECK-NEXT: "#func_alias" = "#func"
; CHECK-NEXT: .globl "#func_alias2"
; CHECK-NEXT: .def "#func_alias2";
; CHECK-NEXT: .scl 2;
; CHECK-NEXT: .type 32;
; CHECK-NEXT: .endef
-; CHECK-NEXT: .set "#func_alias2", "#func_alias"
+; CHECK-NEXT: "#func_alias2" = "#func_alias"
; CHECK: .globl "#patchable_alias"
; CHECK-NEXT: .def "#patchable_alias";
; CHECK-NEXT: .scl 2;
; CHECK-NEXT: .type 32;
; CHECK-NEXT: .endef
-; CHECK-NEXT: .set "#patchable_alias", "#patchable_func"
+; CHECK-NEXT: "#patchable_alias" = "#patchable_func"
diff --git a/llvm/test/CodeGen/AArch64/arm64ec-hybrid-patchable.ll b/llvm/test/CodeGen/AArch64/arm64ec-hybrid-patchable.ll
index f964484c0c2d4..7c77832a9d9a5 100644
--- a/llvm/test/CodeGen/AArch64/arm64ec-hybrid-patchable.ll
+++ b/llvm/test/CodeGen/AArch64/arm64ec-hybrid-patchable.ll
@@ -76,7 +76,7 @@ define dso_local void @caller() nounwind {
; CHECK-NEXT: .p2align 2
; CHECK-NEXT: "#caller": // @"#caller"
; CHECK-NEXT: .weak_anti_dep caller
-; CHECK-NEXT: .set caller, "#caller"{{$}}
+; CHECK-NEXT: caller = "#caller"{{$}}
; CHECK-NEXT: // %bb.0:
; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NEXT: bl "#func"
@@ -253,13 +253,13 @@ define dso_local void @caller() nounwind {
; CHECK-NEXT: .type 32;
; CHECK-NEXT: .endef
; CHECK-NEXT: .weak func
-; CHECK-NEXT: .set func, "EXP+#func"{{$}}
+; CHECK-NEXT: func = "EXP+#func"{{$}}
; CHECK-NEXT: .weak "#func"
; CHECK-NEXT: .def "#func";
; CHECK-NEXT: .scl 2;
; CHECK-NEXT: .type 32;
; CHECK-NEXT: .endef
-; CHECK-NEXT: .set "#func", "#func$hybpatch_thunk"{{$}}
+; CHECK-NEXT: "#func" = "#func$hybpatch_thunk"{{$}}
; CHECK-NEXT: .def "EXP+#has_varargs";
; CHECK-NEXT: .scl 2;
; CHECK-NEXT: .type 32;
@@ -269,13 +269,13 @@ define dso_local void @caller() nounwind {
; CHECK-NEXT: .type 32;
; CHECK-NEXT: .endef
; CHECK-NEXT: .weak has_varargs
-; CHECK-NEXT: .set has_varargs, "EXP+#has_varargs"
+; CHECK-NEXT: has_varargs = "EXP+#has_varargs"
; CHECK-NEXT: .weak "#has_varargs"
; CHECK-NEXT: .def "#has_varargs";
; CHECK-NEXT: .scl 2;
; CHECK-NEXT: .type 32;
; CHECK-NEXT: .endef
-; CHECK-NEXT: .set "#has_varargs", "#has_varargs$hybpatch_thunk"
+; CHECK-NEXT: "#has_varargs" = "#has_varargs$hybpatch_thunk"
; CHECK-NEXT: .def "EXP+#has_sret";
; CHECK-NEXT: .scl 2;
; CHECK-NEXT: .type 32;
@@ -285,13 +285,13 @@ define dso_local void @caller() nounwind {
; CHECK-NEXT: .type 32;
; CHECK-NEXT: .endef
; CHECK-NEXT: .weak has_sret
-; CHECK-NEXT: .set has_sret, "EXP+#has_sret"
+; CHECK-NEXT: has_sret = "EXP+#has_sret"
; CHECK-NEXT: .weak "#has_sret"
; CHECK-NEXT: .def "#has_sret";
; CHECK-NEXT: .scl 2;
; CHECK-NEXT: .type 32;
; CHECK-NEXT: .endef
-; CHECK-NEXT: .set "#has_sret", "#has_sret$hybpatch_thunk"
+; CHECK-NEXT: "#has_sret" = "#has_sret$hybpatch_thunk"
; CHECK-NEXT: .def "EXP+#exp";
; CHECK-NEXT: .scl 2;
; CHECK-NEXT: .type 32;
@@ -301,13 +301,13 @@ define dso_local void @caller() nounwind {
; CHECK-NEXT: .type 32;
; CHECK-NEXT: .endef
; CHECK-NEXT: .weak exp
-; CHECK-NEXT: .set exp, "EXP+#exp"
+; CHECK-NEXT: exp = "EXP+#exp"
; CHECK-NEXT: .weak "#exp"
; CHECK-NEXT: .def "#exp";
; CHECK-NEXT: .scl 2;
; CHECK-NEXT: .type 32;
; CHECK-NEXT: .endef
-; CHECK-NEXT: .set "#exp", "#exp$hybpatch_thunk"
+; CHECK-NEXT: "#exp" = "#exp$hybpatch_thunk"
; SYM: [53](sec 15)(fl 0x00)(ty 20)(scl 2) (nx 0) 0x00000000 #func$hybpatch_thunk
; SYM: [58](sec 16)(fl 0x00)(ty 20)(scl 2) (nx 0) 0x00000000 #has_varargs$hybpatch_thunk
diff --git a/llvm/test/CodeGen/AArch64/arm64ec-symbols.ll b/llvm/test/CodeGen/AArch64/arm64ec-symbols.ll
index b79dd7d61dd60..b44f39ad7b735 100644
--- a/llvm/test/CodeGen/AArch64/arm64ec-symbols.ll
+++ b/llvm/test/CodeGen/AArch64/arm64ec-symbols.ll
@@ -10,12 +10,12 @@ define void @caller() nounwind {
}
; CHECK: .weak_anti_dep caller
-; CHECK-NEXT: .set caller, "#caller"{{$}}
+; CHECK-NEXT: caller = "#caller"{{$}}
; CHECK: .weak_anti_dep func
-; CHECK-NEXT: .set func, "#func"{{$}}
+; CHECK-NEXT: func = "#func"{{$}}
; CHECK-NEXT: .weak_anti_dep "#func"
-; CHECK-NEXT: .set "#func", "#func$exit_thunk"{{$}}
+; CHECK-NEXT: "#func" = "#func$exit_thunk"{{$}}
; SYM: [ 8](sec 4)(fl 0x00)(ty 20)(scl 2) (nx 0) 0x00000000 #caller
; SYM: [21](sec 7)(fl 0x00)(ty 20)(scl 2) (nx 0) 0x00000000 #func$exit_thunk
diff --git a/llvm/test/CodeGen/AArch64/arm64ec-varargs.ll b/llvm/test/CodeGen/AArch64/arm64ec-varargs.ll
index 5fab5738078dc..389969bebaea4 100644
--- a/llvm/test/CodeGen/AArch64/arm64ec-varargs.ll
+++ b/llvm/test/CodeGen/AArch64/arm64ec-varargs.ll
@@ -45,9 +45,9 @@ define void @varargs_caller() nounwind {
; CHECK-NEXT: stp x9, x8, [sp]
; CHECK-NEXT: str xzr, [sp, #16]
; CHECK-NEXT: .weak_anti_dep varargs_callee
-; CHECK-NEXT: .set varargs_callee, "#varargs_callee"
+; CHECK-NEXT: varargs_callee = "#varargs_callee"
; CHECK-NEXT: .weak_anti_dep "#varargs_callee"
-; CHECK-NEXT: .set "#varargs_callee", varargs_callee
+; CHECK-NEXT: "#varargs_callee" = varargs_callee
; CHECK-NEXT: bl "#varargs_callee"
; CHECK-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
; CHECK-NEXT: add sp, sp, #48
@@ -86,9 +86,9 @@ define void @varargs_many_argscalleer() nounwind {
; CHECK-NEXT: stp x9, x8, [sp]
; CHECK-NEXT: stp q0, q0, [sp, #16]
; CHECK-NEXT: .weak_anti_dep varargs_many_argscallee
-; CHECK-NEXT: .set varargs_many_argscallee, "#varargs_many_argscallee"
+; CHECK-NEXT: varargs_many_argscallee = "#varargs_many_argscallee"
; CHECK-NEXT: .weak_anti_dep "#varargs_many_argscallee"
-; CHECK-NEXT: .set "#varargs_many_argscallee", varargs_many_argscallee
+; CHECK-NEXT: "#varargs_many_argscallee" = varargs_many_argscallee
; CHECK-NEXT: bl "#varargs_many_argscallee"
; CHECK-NEXT: ldr x30, [sp, #48] // 8-byte Folded Reload
; CHECK-NEXT: add sp, sp, #64
@@ -116,9 +116,9 @@ define void @varargs_caller_tail() nounwind {
; CHECK-NEXT: stp x9, x8, [sp]
; CHECK-NEXT: str xzr, [sp, #16]
; CHECK-NEXT: .weak_anti_dep varargs_callee
-; CHECK-NEXT: .set varargs_callee, "#varargs_callee"
+; CHECK-NEXT: varargs_callee = "#varargs_callee"
; CHECK-NEXT: .weak_anti_dep "#varargs_callee"
-; CHECK-NEXT: .set "#varargs_callee", varargs_callee
+; CHECK-NEXT: "#varargs_callee" = varargs_callee
; CHECK-NEXT: bl "#varargs_callee"
; CHECK-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
; CHECK-NEXT: add x4, sp, #48
@@ -129,9 +129,9 @@ define void @varargs_caller_tail() nounwind {
; CHECK-NEXT: mov x5, xzr
; CHECK-NEXT: add sp, sp, #48
; CHECK-NEXT: .weak_anti_dep varargs_callee
-; CHECK-NEXT: .set varargs_callee, "#varargs_callee"
+; CHECK-NEXT: varargs_callee = "#varargs_callee"
; CHECK-NEXT: .weak_anti_dep "#varargs_callee"
-; CHECK-NEXT: .set "#varargs_callee", varargs_callee
+; CHECK-NEXT: "#varargs_callee" = varargs_callee
; CHECK-NEXT: b "#varargs_callee"
call void (double, ...) @varargs_callee(double 1.0, i32 2, double 3.0, i32 4, double 5.0, <2 x double> <double 0.0, double 0.0>)
tail call void (double, ...) @varargs_callee(double 1.0, i32 4, i32 3, i32 2)
diff --git a/llvm/test/CodeGen/AArch64/ehcontguard.ll b/llvm/test/CodeGen/AArch64/ehcontguard.ll
index eecff391d0f8c..cb603a482d228 100644
--- a/llvm/test/CodeGen/AArch64/ehcontguard.ll
+++ b/llvm/test/CodeGen/AArch64/ehcontguard.ll
@@ -1,7 +1,7 @@
; RUN: llc < %s -mtriple=aarch64-windows | FileCheck %s
; EHCont Guard is currently only available on Windows
-; CHECK: .set "@feat.00", 16384
+; CHECK: "@feat.00" = 16384
; CHECK: .section .gehcont$y
diff --git a/llvm/test/CodeGen/AArch64/global-merge-1.ll b/llvm/test/CodeGen/AArch64/global-merge-1.ll
index cc17e344c211a..626310fc4ec25 100644
--- a/llvm/test/CodeGen/AArch64/global-merge-1.ll
+++ b/llvm/test/CodeGen/AArch64/global-merge-1.ll
@@ -23,9 +23,9 @@ define void @f1(i32 %a1, i32 %a2) {
;CHECK: .type .L_MergedGlobals, at object // @_MergedGlobals
;CHECK: .local .L_MergedGlobals
;CHECK: .comm .L_MergedGlobals,8,4
-;CHECK: .set m, .L_MergedGlobals
-;CHECK: .set n, .L_MergedGlobals+4
+;CHECK: m = .L_MergedGlobals
+;CHECK: n = .L_MergedGlobals+4
;CHECK-APPLE-IOS: .zerofill __DATA,__bss,__MergedGlobals,8,2 ; @_MergedGlobals
-;CHECK-APPLE-IOS-NOT: .set _m, l__MergedGlobals
-;CHECK-APPLE-IOS-NOT: .set _n, l__MergedGlobals+4
+;CHECK-APPLE-IOS-NOT: _m = l__MergedGlobals
+;CHECK-APPLE-IOS-NOT: _n = l__MergedGlobals+4
diff --git a/llvm/test/CodeGen/AArch64/global-merge-2.ll b/llvm/test/CodeGen/AArch64/global-merge-2.ll
index 85d814c3177b3..1b5333b907d27 100644
--- a/llvm/test/CodeGen/AArch64/global-merge-2.ll
+++ b/llvm/test/CodeGen/AArch64/global-merge-2.ll
@@ -32,21 +32,21 @@ define dso_local void @g1(i32 %a1, i32 %a2) {
;CHECK: .comm .L_MergedGlobals,12,4
;CHECK: .globl x
-;CHECK: .set x, .L_MergedGlobals
+;CHECK: x = .L_MergedGlobals
;CHECK: .size x, 4
;CHECK: .globl y
-;CHECK: .set y, .L_MergedGlobals+4
+;CHECK: y = .L_MergedGlobals+4
;CHECK: .size y, 4
;CHECK: .globl z
-;CHECK: .set z, .L_MergedGlobals+8
+;CHECK: z = .L_MergedGlobals+8
;CHECK: .size z, 4
;CHECK-APPLE-IOS: .zerofill __DATA,__common,__MergedGlobals_x,12,2
;CHECK-APPLE-IOS: .globl _x
-;CHECK-APPLE-IOS: .set {{.*}}, __MergedGlobals_x
+;CHECK-APPLE-IOS: {{.*}} = __MergedGlobals_x
;CHECK-APPLE-IOS: .globl _y
-;CHECK-APPLE-IOS: .set _y, __MergedGlobals_x+4
+;CHECK-APPLE-IOS: _y = __MergedGlobals_x+4
;CHECK-APPLE-IOS: .globl _z
-;CHECK-APPLE-IOS: .set _z, __MergedGlobals_x+8
+;CHECK-APPLE-IOS: _z = __MergedGlobals_x+8
;CHECK-APPLE-IOS: .subsections_via_symbols
diff --git a/llvm/test/CodeGen/AArch64/global-merge-3.ll b/llvm/test/CodeGen/AArch64/global-merge-3.ll
index b3f58887139f7..2a0ae12274556 100644
--- a/llvm/test/CodeGen/AArch64/global-merge-3.ll
+++ b/llvm/test/CodeGen/AArch64/global-merge-3.ll
@@ -40,14 +40,14 @@ define dso_local void @f1(i32 %a1, i32 %a2, i32 %a3) {
;CHECK-APPLE-IOS: .globl __MergedGlobals_x
;CHECK-APPLE-IOS: .zerofill __DATA,__common,__MergedGlobals_x,800,2
-;CHECK-APPLE-IOS: .set _x, __MergedGlobals_x
-;CHECK-APPLE-IOS: .set _y, __MergedGlobals_x+400
+;CHECK-APPLE-IOS: _x = __MergedGlobals_x
+;CHECK-APPLE-IOS: _y = __MergedGlobals_x+400
;CHECK: .type .L_MergedGlobals, at object // @_MergedGlobals
;CHECK: .local .L_MergedGlobals
;CHECK: .comm .L_MergedGlobals,800,4
;CHECK: globl x
-;CHECK: .set x, .L_MergedGlobals
+;CHECK: x = .L_MergedGlobals
;CHECK: globl y
-;CHECK: .set y, .L_MergedGlobals+400
-;CHECK-NOT: .set z, .L_MergedGlobals
+;CHECK: y = .L_MergedGlobals+400
+;CHECK-NOT: z = .L_MergedGlobals
diff --git a/llvm/test/CodeGen/AArch64/global-merge-hidden-minsize.ll b/llvm/test/CodeGen/AArch64/global-merge-hidden-minsize.ll
index 9c694fc4d289c..5292aa91fc381 100644
--- a/llvm/test/CodeGen/AArch64/global-merge-hidden-minsize.ll
+++ b/llvm/test/CodeGen/AArch64/global-merge-hidden-minsize.ll
@@ -16,10 +16,10 @@ attributes #0 = { minsize optsize }
; CHECK: .globl x
; CHECK: .hidden x
-; CHECK: .set x, .L_MergedGlobals
+; CHECK: x = .L_MergedGlobals
; CHECK: .size x, 4
; CHECK: .globl y
; CHECK: .hidden y
-; CHECK: .set y, .L_MergedGlobals+4
+; CHECK: y = .L_MergedGlobals+4
; CHECK: .size y, 4
diff --git a/llvm/test/CodeGen/AArch64/ifunc-asm.ll b/llvm/test/CodeGen/AArch64/ifunc-asm.ll
index 57fc2f0c9d7f5..7aad6cce09cf2 100644
--- a/llvm/test/CodeGen/AArch64/ifunc-asm.ll
+++ b/llvm/test/CodeGen/AArch64/ifunc-asm.ll
@@ -16,7 +16,7 @@ entry:
@global_ifunc = ifunc i32 (i32), ptr @the_resolver
; ELF: .globl global_ifunc
; ELF-NEXT: .type global_ifunc, at gnu_indirect_function
-; ELF-NEXT: .set global_ifunc, the_resolver
+; ELF-NEXT: global_ifunc = the_resolver
; MACHO: .section __DATA,__data
; MACHO-NEXT: .p2align 3, 0x0
diff --git a/llvm/test/CodeGen/AArch64/seh-finally.ll b/llvm/test/CodeGen/AArch64/seh-finally.ll
index 04a30800d9294..fd6b3fd0bc1fc 100644
--- a/llvm/test/CodeGen/AArch64/seh-finally.ll
+++ b/llvm/test/CodeGen/AArch64/seh-finally.ll
@@ -38,7 +38,7 @@ entry:
; CHECK: add x29, sp, #16
; CHECK: mov x0, #-2
; CHECK: stur x0, [x29, #16]
-; CHECK: .set .Lsimple_seh$frame_escape_0, -8
+; CHECK: .Lsimple_seh$frame_escape_0 = -8
; CHECK: ldur w0, [x29, #-8]
; CHECK: bl foo
@@ -89,7 +89,7 @@ entry:
; CHECK: mov x19, sp
; CHECK: mov x0, #-2
; CHECK: stur x0, [x29, #24]
-; CHECK: .set .Lstack_realign$frame_escape_0, 0
+; CHECK: .Lstack_realign$frame_escape_0 = 0
; CHECK: ldr w0, [x19]
; CHECK: bl foo
@@ -137,7 +137,7 @@ entry:
; CHECK: add x29, sp, #32
; CHECK: mov x1, #-2
; CHECK: stur x1, [x29, #16]
-; CHECK: .set .Lvla_present$frame_escape_0, -4
+; CHECK: .Lvla_present$frame_escape_0 = -4
; CHECK: stur w0, [x29, #-4]
; CHECK: ldur w8, [x29, #-4]
; CHECK: mov x9, sp
@@ -204,7 +204,7 @@ entry:
; CHECK: mov x19, sp
; CHECK: mov x1, #-2
; CHECK: stur x1, [x29, #24]
-; CHECK: .set .Lvla_and_realign$frame_escape_0, 32
+; CHECK: .Lvla_and_realign$frame_escape_0 = 32
; CHECK: str w0, [x29, #36]
; CHECK: ldr w8, [x29, #36]
; CHECK: mov x9, sp
diff --git a/llvm/test/CodeGen/AArch64/stackguard-internal.ll b/llvm/test/CodeGen/AArch64/stackguard-internal.ll
index a70c8874edbac..7b32e8c0caab5 100644
--- a/llvm/test/CodeGen/AArch64/stackguard-internal.ll
+++ b/llvm/test/CodeGen/AArch64/stackguard-internal.ll
@@ -6,7 +6,7 @@ target triple = "aarch64-linux-gnu"
; is an alias. (The alias is created by GlobalMerge.)
; CHECK: adrp {{.*}}, __stack_chk_guard
; CHECK: ldr {{.*}}, [{{.*}}, :lo12:__stack_chk_guard]
-; CHECK: .set __stack_chk_guard, .L_MergedGlobals+4
+; CHECK: __stack_chk_guard = .L_MergedGlobals+4
@__stack_chk_guard = internal global [8 x i32] zeroinitializer, align 4
@x = internal global i32 0, align 4
diff --git a/llvm/test/CodeGen/ARM/alias_store.ll b/llvm/test/CodeGen/ARM/alias_store.ll
index c6612334eaf1b..60aa58d37499c 100644
--- a/llvm/test/CodeGen/ARM/alias_store.ll
+++ b/llvm/test/CodeGen/ARM/alias_store.ll
@@ -13,4 +13,4 @@ entry:
; CHECK: ldr r{{.*}}, [[L:.*]]
; CHECK: [[L]]:
; CHECK-NEXT: .long XA
-; CHECK: .set XA, X+1
+; CHECK: XA = X+1
diff --git a/llvm/test/CodeGen/ARM/aliases.ll b/llvm/test/CodeGen/ARM/aliases.ll
index 6075ad813e990..8d9f938155d15 100644
--- a/llvm/test/CodeGen/ARM/aliases.ll
+++ b/llvm/test/CodeGen/ARM/aliases.ll
@@ -6,30 +6,30 @@
; CHECK: .size .Lstructvar, 8
; CHECK: .globl foo1
-; CHECK: .set foo1, bar
+; CHECK: foo1 = bar
; CHECK-NOT: .size foo1
; CHECK: .globl foo2
-; CHECK: .set foo2, bar
+; CHECK: foo2 = bar
; CHECK-NOT: .size foo2
; CHECK: .weak bar_f
-; CHECK: .set bar_f, foo_f
+; CHECK: bar_f = foo_f
; CHECK-NOT: .size bar_f
-; CHECK: .set bar_i, bar
+; CHECK: bar_i = bar
; CHECK-NOT: .size bar_i
; CHECK: .globl A
-; CHECK: .set A, bar
+; CHECK: A = bar
; CHECK-NOT: .size A
; CHECK: ....
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/142289
More information about the llvm-commits
mailing list