[llvm] Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set (PR #142289)
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Sat May 31 14:08:41 PDT 2025
https://github.com/MaskRay created https://github.com/llvm/llvm-project/pull/142289
Introduce MCAsmInfo::UsesSetToEquateSymbol to control the preferred
syntax for symbol equating. We now favor the more readable and common
`symbol = expression` syntax over `.set`. This aligns with pre-D44256 behavior.
On Apple platforms, this resolves a clang -S vs -c behavior difference (resolves #104623).
For targets whose = support is unconfirmed, UsesSetToEquateSymbol is set to false.
This also minimizes test updates.
>From 3497280db45c210d685c7b22c71d86679b2afee5 Mon Sep 17 00:00:00 2001
From: Fangrui Song <i at maskray.me>
Date: Sat, 31 May 2025 14:08:28 -0700
Subject: [PATCH] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20initia?=
=?UTF-8?q?l=20version?=
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Created using spr 1.3.5-bogner
---
llvm/include/llvm/MC/MCAsmInfo.h | 4 ++
llvm/lib/MC/MCAsmStreamer.cpp | 6 ++-
.../AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp | 1 +
.../Hexagon/MCTargetDesc/HexagonMCAsmInfo.cpp | 1 +
.../PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp | 2 +
.../SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp | 1 +
llvm/test/CodeGen/AArch64/arm64ec-alias.ll | 14 +++---
.../AArch64/arm64ec-hybrid-patchable.ll | 18 +++----
llvm/test/CodeGen/AArch64/arm64ec-symbols.ll | 6 +--
llvm/test/CodeGen/AArch64/arm64ec-varargs.ll | 16 +++---
llvm/test/CodeGen/AArch64/ehcontguard.ll | 2 +-
llvm/test/CodeGen/AArch64/global-merge-1.ll | 8 +--
llvm/test/CodeGen/AArch64/global-merge-2.ll | 12 ++---
llvm/test/CodeGen/AArch64/global-merge-3.ll | 10 ++--
.../AArch64/global-merge-hidden-minsize.ll | 4 +-
llvm/test/CodeGen/AArch64/ifunc-asm.ll | 2 +-
llvm/test/CodeGen/AArch64/seh-finally.ll | 8 +--
.../CodeGen/AArch64/stackguard-internal.ll | 2 +-
llvm/test/CodeGen/ARM/alias_store.ll | 2 +-
llvm/test/CodeGen/ARM/aliases.ll | 14 +++---
.../CodeGen/ARM/global-merge-dllexport.ll | 4 +-
.../CodeGen/ARM/global-merge-external-2.ll | 12 ++---
.../test/CodeGen/ARM/global-merge-external.ll | 12 ++---
llvm/test/CodeGen/AVR/global-aliases.ll | 28 +++++------
llvm/test/CodeGen/Mips/hf16call32_body.ll | 24 ++++-----
llvm/test/CodeGen/Mips/mips16ex.ll | 2 +-
.../PowerPC/asm-printer-topological-order.ll | 6 +--
llvm/test/CodeGen/PowerPC/data-align.ll | 10 ++--
llvm/test/CodeGen/WebAssembly/aliases.ll | 22 ++++----
llvm/test/CodeGen/WinCFGuard/cfguard-mingw.ll | 2 +-
llvm/test/CodeGen/WinCFGuard/cfguard.ll | 2 +-
.../CodeGen/X86/2007-09-06-ExtWeakAliasee.ll | 2 +-
llvm/test/CodeGen/X86/2009-08-12-badswitch.ll | 50 +++++++++----------
.../CodeGen/X86/2010-05-26-DotDebugLoc.ll | 8 +--
llvm/test/CodeGen/X86/alias-gep.ll | 8 +--
llvm/test/CodeGen/X86/aliases.ll | 8 +--
.../CodeGen/X86/catchret-empty-fallthrough.ll | 2 +-
llvm/test/CodeGen/X86/coff-alias-type.ll | 2 +-
llvm/test/CodeGen/X86/coff-comdat.ll | 2 +-
llvm/test/CodeGen/X86/coff-feat00.ll | 2 +-
llvm/test/CodeGen/X86/dllexport-x86_64.ll | 10 ++--
llvm/test/CodeGen/X86/dllexport.ll | 8 +--
llvm/test/CodeGen/X86/ehcontguard.ll | 2 +-
.../CodeGen/X86/fastcall-correct-mangling.ll | 4 +-
llvm/test/CodeGen/X86/ifunc-asm.ll | 2 +-
.../test/CodeGen/X86/lea-opt-memop-check-1.ll | 6 +--
llvm/test/CodeGen/X86/linux-preemption.ll | 16 +++---
llvm/test/CodeGen/X86/localescape.ll | 16 +++---
llvm/test/CodeGen/X86/pr22019.ll | 8 +--
llvm/test/CodeGen/X86/seh-catch-all-win32.ll | 4 +-
llvm/test/CodeGen/X86/seh-catchpad.ll | 2 +-
llvm/test/CodeGen/X86/seh-finally.ll | 2 +-
llvm/test/CodeGen/X86/seh-no-invokes.ll | 2 +-
llvm/test/CodeGen/X86/seh-stack-realign.ll | 4 +-
llvm/test/CodeGen/X86/tailcall-cgp-dup.ll | 12 ++---
.../X86/windows-seh-EHa-TryInFinally.ll | 2 +-
llvm/test/CodeGen/XCore/globals.ll | 2 +-
llvm/test/CodeGen/XCore/linkage.ll | 4 +-
llvm/test/MC/AArch64/basic-a64-instructions.s | 2 +-
llvm/test/MC/AsmParser/assignment.s | 12 ++---
llvm/test/MC/AsmParser/directive_include.s | 2 +-
llvm/test/MC/AsmParser/directive_set.s | 6 +--
llvm/test/MC/AsmParser/include.ll | 4 +-
llvm/test/MC/AsmParser/labels.s | 6 +--
llvm/test/MC/AsmParser/macro-arg-darwin.s | 4 +-
llvm/test/MC/AsmParser/motorola_integers.s | 16 +++---
llvm/test/MC/Mips/cpsetup.s | 2 +-
67 files changed, 256 insertions(+), 245 deletions(-)
diff --git a/llvm/include/llvm/MC/MCAsmInfo.h b/llvm/include/llvm/MC/MCAsmInfo.h
index 3a31957f2f6be..f656f364981d2 100644
--- a/llvm/include/llvm/MC/MCAsmInfo.h
+++ b/llvm/include/llvm/MC/MCAsmInfo.h
@@ -140,6 +140,9 @@ class MCAsmInfo {
/// This is appended to emitted labels. Defaults to ":"
const char *LabelSuffix;
+ /// Use .set instead of = to equate a symbol to an expression.
+ bool UsesSetToEquateSymbol = false;
+
// Print the EH begin symbol with an assignment. Defaults to false.
bool UseAssignmentForEHBegin = false;
@@ -520,6 +523,7 @@ class MCAsmInfo {
bool shouldAllowAdditionalComments() const { return AllowAdditionalComments; }
const char *getLabelSuffix() const { return LabelSuffix; }
+ bool usesSetToEquateSymbol() const { return UsesSetToEquateSymbol; }
bool useAssignmentForEHBegin() const { return UseAssignmentForEHBegin; }
bool needsLocalForSize() const { return NeedsLocalForSize; }
StringRef getPrivateGlobalPrefix() const { return PrivateGlobalPrefix; }
diff --git a/llvm/lib/MC/MCAsmStreamer.cpp b/llvm/lib/MC/MCAsmStreamer.cpp
index da0d99e70d9ea..4380f74318e7b 100644
--- a/llvm/lib/MC/MCAsmStreamer.cpp
+++ b/llvm/lib/MC/MCAsmStreamer.cpp
@@ -695,9 +695,11 @@ void MCAsmStreamer::emitAssignment(MCSymbol *Symbol, const MCExpr *Value) {
if (E->inlineAssignedExpr())
EmitSet = false;
if (EmitSet) {
- OS << ".set ";
+ bool UseSet = MAI->usesSetToEquateSymbol();
+ if (UseSet)
+ OS << ".set ";
Symbol->print(OS, MAI);
- OS << ", ";
+ OS << (UseSet ? ", " : " = ");
Value->print(OS, MAI);
EmitEOL();
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
index 6f1d89e500ed3..fcf134aa8658f 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
@@ -42,6 +42,7 @@ AMDGPUMCAsmInfo::AMDGPUMCAsmInfo(const Triple &TT,
CommentString = ";";
InlineAsmStart = ";#ASMSTART";
InlineAsmEnd = ";#ASMEND";
+ UsesSetToEquateSymbol = true;
//===--- Data Emission Directives -------------------------------------===//
UsesELFSectionDirectiveForBSS = true;
diff --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCAsmInfo.cpp b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCAsmInfo.cpp
index 7675b05f106a0..ba8faaeb74a07 100644
--- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCAsmInfo.cpp
+++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCAsmInfo.cpp
@@ -38,6 +38,7 @@ HexagonMCAsmInfo::HexagonMCAsmInfo(const Triple &TT) {
LCOMMDirectiveAlignmentType = LCOMM::ByteAlignment;
InlineAsmStart = "# InlineAsm Start";
InlineAsmEnd = "# InlineAsm End";
+ UsesSetToEquateSymbol = true;
ZeroDirective = "\t.space\t";
AscizDirective = "\t.string\t";
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
index 160ee07fad5cc..b5be23c5a96ad 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
@@ -155,5 +155,7 @@ PPCXCOFFMCAsmInfo::PPCXCOFFMCAsmInfo(bool Is64Bit, const Triple &T) {
// Support $ as PC in inline asm
DollarIsPC = true;
+ UsesSetToEquateSymbol = true;
+
initializeVariantKinds(variantKindDescs);
}
diff --git a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
index 27272cdbbd230..e9d387399bf30 100644
--- a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
+++ b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
@@ -49,6 +49,7 @@ SystemZMCAsmInfoGOFF::SystemZMCAsmInfoGOFF(const Triple &TT) {
CalleeSaveStackSlotSize = 8;
CodePointerSize = 8;
CommentString = "*";
+ UsesSetToEquateSymbol = true;
ExceptionsType = ExceptionHandling::ZOS;
IsHLASM = true;
IsLittleEndian = false;
diff --git a/llvm/test/CodeGen/AArch64/arm64ec-alias.ll b/llvm/test/CodeGen/AArch64/arm64ec-alias.ll
index 03cc873136940..18023a95a5d20 100644
--- a/llvm/test/CodeGen/AArch64/arm64ec-alias.ll
+++ b/llvm/test/CodeGen/AArch64/arm64ec-alias.ll
@@ -13,30 +13,30 @@ define dso_local void @patchable_func() hybrid_patchable {
@patchable_alias = alias void (), ptr @patchable_func
; CHECK: .weak_anti_dep func_alias
-; CHECK-NEXT: .set func_alias, "#func_alias"
+; CHECK-NEXT: func_alias = "#func_alias"
; CHECK-NEXT: .weak_anti_dep func_alias2
-; CHECK-NEXT: .set func_alias2, "#func_alias2"
+; CHECK-NEXT: func_alias2 = "#func_alias2"
; CHECK-NEXT: .weak_anti_dep func
-; CHECK-NEXT: .set func, "#func"
+; CHECK-NEXT: func = "#func"
; CHECK: .weak_anti_dep patchable_alias
-; CHECK-NEXT: .set patchable_alias, "#patchable_alias"
+; CHECK-NEXT: patchable_alias = "#patchable_alias"
; CHECK: .globl "#func_alias"
; CHECK-NEXT: .def "#func_alias";
; CHECK-NEXT: .scl 2;
; CHECK-NEXT: .type 32;
; CHECK-NEXT: .endef
-; CHECK-NEXT: .set "#func_alias", "#func"
+; CHECK-NEXT: "#func_alias" = "#func"
; CHECK-NEXT: .globl "#func_alias2"
; CHECK-NEXT: .def "#func_alias2";
; CHECK-NEXT: .scl 2;
; CHECK-NEXT: .type 32;
; CHECK-NEXT: .endef
-; CHECK-NEXT: .set "#func_alias2", "#func_alias"
+; CHECK-NEXT: "#func_alias2" = "#func_alias"
; CHECK: .globl "#patchable_alias"
; CHECK-NEXT: .def "#patchable_alias";
; CHECK-NEXT: .scl 2;
; CHECK-NEXT: .type 32;
; CHECK-NEXT: .endef
-; CHECK-NEXT: .set "#patchable_alias", "#patchable_func"
+; CHECK-NEXT: "#patchable_alias" = "#patchable_func"
diff --git a/llvm/test/CodeGen/AArch64/arm64ec-hybrid-patchable.ll b/llvm/test/CodeGen/AArch64/arm64ec-hybrid-patchable.ll
index f964484c0c2d4..7c77832a9d9a5 100644
--- a/llvm/test/CodeGen/AArch64/arm64ec-hybrid-patchable.ll
+++ b/llvm/test/CodeGen/AArch64/arm64ec-hybrid-patchable.ll
@@ -76,7 +76,7 @@ define dso_local void @caller() nounwind {
; CHECK-NEXT: .p2align 2
; CHECK-NEXT: "#caller": // @"#caller"
; CHECK-NEXT: .weak_anti_dep caller
-; CHECK-NEXT: .set caller, "#caller"{{$}}
+; CHECK-NEXT: caller = "#caller"{{$}}
; CHECK-NEXT: // %bb.0:
; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NEXT: bl "#func"
@@ -253,13 +253,13 @@ define dso_local void @caller() nounwind {
; CHECK-NEXT: .type 32;
; CHECK-NEXT: .endef
; CHECK-NEXT: .weak func
-; CHECK-NEXT: .set func, "EXP+#func"{{$}}
+; CHECK-NEXT: func = "EXP+#func"{{$}}
; CHECK-NEXT: .weak "#func"
; CHECK-NEXT: .def "#func";
; CHECK-NEXT: .scl 2;
; CHECK-NEXT: .type 32;
; CHECK-NEXT: .endef
-; CHECK-NEXT: .set "#func", "#func$hybpatch_thunk"{{$}}
+; CHECK-NEXT: "#func" = "#func$hybpatch_thunk"{{$}}
; CHECK-NEXT: .def "EXP+#has_varargs";
; CHECK-NEXT: .scl 2;
; CHECK-NEXT: .type 32;
@@ -269,13 +269,13 @@ define dso_local void @caller() nounwind {
; CHECK-NEXT: .type 32;
; CHECK-NEXT: .endef
; CHECK-NEXT: .weak has_varargs
-; CHECK-NEXT: .set has_varargs, "EXP+#has_varargs"
+; CHECK-NEXT: has_varargs = "EXP+#has_varargs"
; CHECK-NEXT: .weak "#has_varargs"
; CHECK-NEXT: .def "#has_varargs";
; CHECK-NEXT: .scl 2;
; CHECK-NEXT: .type 32;
; CHECK-NEXT: .endef
-; CHECK-NEXT: .set "#has_varargs", "#has_varargs$hybpatch_thunk"
+; CHECK-NEXT: "#has_varargs" = "#has_varargs$hybpatch_thunk"
; CHECK-NEXT: .def "EXP+#has_sret";
; CHECK-NEXT: .scl 2;
; CHECK-NEXT: .type 32;
@@ -285,13 +285,13 @@ define dso_local void @caller() nounwind {
; CHECK-NEXT: .type 32;
; CHECK-NEXT: .endef
; CHECK-NEXT: .weak has_sret
-; CHECK-NEXT: .set has_sret, "EXP+#has_sret"
+; CHECK-NEXT: has_sret = "EXP+#has_sret"
; CHECK-NEXT: .weak "#has_sret"
; CHECK-NEXT: .def "#has_sret";
; CHECK-NEXT: .scl 2;
; CHECK-NEXT: .type 32;
; CHECK-NEXT: .endef
-; CHECK-NEXT: .set "#has_sret", "#has_sret$hybpatch_thunk"
+; CHECK-NEXT: "#has_sret" = "#has_sret$hybpatch_thunk"
; CHECK-NEXT: .def "EXP+#exp";
; CHECK-NEXT: .scl 2;
; CHECK-NEXT: .type 32;
@@ -301,13 +301,13 @@ define dso_local void @caller() nounwind {
; CHECK-NEXT: .type 32;
; CHECK-NEXT: .endef
; CHECK-NEXT: .weak exp
-; CHECK-NEXT: .set exp, "EXP+#exp"
+; CHECK-NEXT: exp = "EXP+#exp"
; CHECK-NEXT: .weak "#exp"
; CHECK-NEXT: .def "#exp";
; CHECK-NEXT: .scl 2;
; CHECK-NEXT: .type 32;
; CHECK-NEXT: .endef
-; CHECK-NEXT: .set "#exp", "#exp$hybpatch_thunk"
+; CHECK-NEXT: "#exp" = "#exp$hybpatch_thunk"
; SYM: [53](sec 15)(fl 0x00)(ty 20)(scl 2) (nx 0) 0x00000000 #func$hybpatch_thunk
; SYM: [58](sec 16)(fl 0x00)(ty 20)(scl 2) (nx 0) 0x00000000 #has_varargs$hybpatch_thunk
diff --git a/llvm/test/CodeGen/AArch64/arm64ec-symbols.ll b/llvm/test/CodeGen/AArch64/arm64ec-symbols.ll
index b79dd7d61dd60..b44f39ad7b735 100644
--- a/llvm/test/CodeGen/AArch64/arm64ec-symbols.ll
+++ b/llvm/test/CodeGen/AArch64/arm64ec-symbols.ll
@@ -10,12 +10,12 @@ define void @caller() nounwind {
}
; CHECK: .weak_anti_dep caller
-; CHECK-NEXT: .set caller, "#caller"{{$}}
+; CHECK-NEXT: caller = "#caller"{{$}}
; CHECK: .weak_anti_dep func
-; CHECK-NEXT: .set func, "#func"{{$}}
+; CHECK-NEXT: func = "#func"{{$}}
; CHECK-NEXT: .weak_anti_dep "#func"
-; CHECK-NEXT: .set "#func", "#func$exit_thunk"{{$}}
+; CHECK-NEXT: "#func" = "#func$exit_thunk"{{$}}
; SYM: [ 8](sec 4)(fl 0x00)(ty 20)(scl 2) (nx 0) 0x00000000 #caller
; SYM: [21](sec 7)(fl 0x00)(ty 20)(scl 2) (nx 0) 0x00000000 #func$exit_thunk
diff --git a/llvm/test/CodeGen/AArch64/arm64ec-varargs.ll b/llvm/test/CodeGen/AArch64/arm64ec-varargs.ll
index 5fab5738078dc..389969bebaea4 100644
--- a/llvm/test/CodeGen/AArch64/arm64ec-varargs.ll
+++ b/llvm/test/CodeGen/AArch64/arm64ec-varargs.ll
@@ -45,9 +45,9 @@ define void @varargs_caller() nounwind {
; CHECK-NEXT: stp x9, x8, [sp]
; CHECK-NEXT: str xzr, [sp, #16]
; CHECK-NEXT: .weak_anti_dep varargs_callee
-; CHECK-NEXT: .set varargs_callee, "#varargs_callee"
+; CHECK-NEXT: varargs_callee = "#varargs_callee"
; CHECK-NEXT: .weak_anti_dep "#varargs_callee"
-; CHECK-NEXT: .set "#varargs_callee", varargs_callee
+; CHECK-NEXT: "#varargs_callee" = varargs_callee
; CHECK-NEXT: bl "#varargs_callee"
; CHECK-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
; CHECK-NEXT: add sp, sp, #48
@@ -86,9 +86,9 @@ define void @varargs_many_argscalleer() nounwind {
; CHECK-NEXT: stp x9, x8, [sp]
; CHECK-NEXT: stp q0, q0, [sp, #16]
; CHECK-NEXT: .weak_anti_dep varargs_many_argscallee
-; CHECK-NEXT: .set varargs_many_argscallee, "#varargs_many_argscallee"
+; CHECK-NEXT: varargs_many_argscallee = "#varargs_many_argscallee"
; CHECK-NEXT: .weak_anti_dep "#varargs_many_argscallee"
-; CHECK-NEXT: .set "#varargs_many_argscallee", varargs_many_argscallee
+; CHECK-NEXT: "#varargs_many_argscallee" = varargs_many_argscallee
; CHECK-NEXT: bl "#varargs_many_argscallee"
; CHECK-NEXT: ldr x30, [sp, #48] // 8-byte Folded Reload
; CHECK-NEXT: add sp, sp, #64
@@ -116,9 +116,9 @@ define void @varargs_caller_tail() nounwind {
; CHECK-NEXT: stp x9, x8, [sp]
; CHECK-NEXT: str xzr, [sp, #16]
; CHECK-NEXT: .weak_anti_dep varargs_callee
-; CHECK-NEXT: .set varargs_callee, "#varargs_callee"
+; CHECK-NEXT: varargs_callee = "#varargs_callee"
; CHECK-NEXT: .weak_anti_dep "#varargs_callee"
-; CHECK-NEXT: .set "#varargs_callee", varargs_callee
+; CHECK-NEXT: "#varargs_callee" = varargs_callee
; CHECK-NEXT: bl "#varargs_callee"
; CHECK-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
; CHECK-NEXT: add x4, sp, #48
@@ -129,9 +129,9 @@ define void @varargs_caller_tail() nounwind {
; CHECK-NEXT: mov x5, xzr
; CHECK-NEXT: add sp, sp, #48
; CHECK-NEXT: .weak_anti_dep varargs_callee
-; CHECK-NEXT: .set varargs_callee, "#varargs_callee"
+; CHECK-NEXT: varargs_callee = "#varargs_callee"
; CHECK-NEXT: .weak_anti_dep "#varargs_callee"
-; CHECK-NEXT: .set "#varargs_callee", varargs_callee
+; CHECK-NEXT: "#varargs_callee" = varargs_callee
; CHECK-NEXT: b "#varargs_callee"
call void (double, ...) @varargs_callee(double 1.0, i32 2, double 3.0, i32 4, double 5.0, <2 x double> <double 0.0, double 0.0>)
tail call void (double, ...) @varargs_callee(double 1.0, i32 4, i32 3, i32 2)
diff --git a/llvm/test/CodeGen/AArch64/ehcontguard.ll b/llvm/test/CodeGen/AArch64/ehcontguard.ll
index eecff391d0f8c..cb603a482d228 100644
--- a/llvm/test/CodeGen/AArch64/ehcontguard.ll
+++ b/llvm/test/CodeGen/AArch64/ehcontguard.ll
@@ -1,7 +1,7 @@
; RUN: llc < %s -mtriple=aarch64-windows | FileCheck %s
; EHCont Guard is currently only available on Windows
-; CHECK: .set "@feat.00", 16384
+; CHECK: "@feat.00" = 16384
; CHECK: .section .gehcont$y
diff --git a/llvm/test/CodeGen/AArch64/global-merge-1.ll b/llvm/test/CodeGen/AArch64/global-merge-1.ll
index cc17e344c211a..626310fc4ec25 100644
--- a/llvm/test/CodeGen/AArch64/global-merge-1.ll
+++ b/llvm/test/CodeGen/AArch64/global-merge-1.ll
@@ -23,9 +23,9 @@ define void @f1(i32 %a1, i32 %a2) {
;CHECK: .type .L_MergedGlobals, at object // @_MergedGlobals
;CHECK: .local .L_MergedGlobals
;CHECK: .comm .L_MergedGlobals,8,4
-;CHECK: .set m, .L_MergedGlobals
-;CHECK: .set n, .L_MergedGlobals+4
+;CHECK: m = .L_MergedGlobals
+;CHECK: n = .L_MergedGlobals+4
;CHECK-APPLE-IOS: .zerofill __DATA,__bss,__MergedGlobals,8,2 ; @_MergedGlobals
-;CHECK-APPLE-IOS-NOT: .set _m, l__MergedGlobals
-;CHECK-APPLE-IOS-NOT: .set _n, l__MergedGlobals+4
+;CHECK-APPLE-IOS-NOT: _m = l__MergedGlobals
+;CHECK-APPLE-IOS-NOT: _n = l__MergedGlobals+4
diff --git a/llvm/test/CodeGen/AArch64/global-merge-2.ll b/llvm/test/CodeGen/AArch64/global-merge-2.ll
index 85d814c3177b3..1b5333b907d27 100644
--- a/llvm/test/CodeGen/AArch64/global-merge-2.ll
+++ b/llvm/test/CodeGen/AArch64/global-merge-2.ll
@@ -32,21 +32,21 @@ define dso_local void @g1(i32 %a1, i32 %a2) {
;CHECK: .comm .L_MergedGlobals,12,4
;CHECK: .globl x
-;CHECK: .set x, .L_MergedGlobals
+;CHECK: x = .L_MergedGlobals
;CHECK: .size x, 4
;CHECK: .globl y
-;CHECK: .set y, .L_MergedGlobals+4
+;CHECK: y = .L_MergedGlobals+4
;CHECK: .size y, 4
;CHECK: .globl z
-;CHECK: .set z, .L_MergedGlobals+8
+;CHECK: z = .L_MergedGlobals+8
;CHECK: .size z, 4
;CHECK-APPLE-IOS: .zerofill __DATA,__common,__MergedGlobals_x,12,2
;CHECK-APPLE-IOS: .globl _x
-;CHECK-APPLE-IOS: .set {{.*}}, __MergedGlobals_x
+;CHECK-APPLE-IOS: {{.*}} = __MergedGlobals_x
;CHECK-APPLE-IOS: .globl _y
-;CHECK-APPLE-IOS: .set _y, __MergedGlobals_x+4
+;CHECK-APPLE-IOS: _y = __MergedGlobals_x+4
;CHECK-APPLE-IOS: .globl _z
-;CHECK-APPLE-IOS: .set _z, __MergedGlobals_x+8
+;CHECK-APPLE-IOS: _z = __MergedGlobals_x+8
;CHECK-APPLE-IOS: .subsections_via_symbols
diff --git a/llvm/test/CodeGen/AArch64/global-merge-3.ll b/llvm/test/CodeGen/AArch64/global-merge-3.ll
index b3f58887139f7..2a0ae12274556 100644
--- a/llvm/test/CodeGen/AArch64/global-merge-3.ll
+++ b/llvm/test/CodeGen/AArch64/global-merge-3.ll
@@ -40,14 +40,14 @@ define dso_local void @f1(i32 %a1, i32 %a2, i32 %a3) {
;CHECK-APPLE-IOS: .globl __MergedGlobals_x
;CHECK-APPLE-IOS: .zerofill __DATA,__common,__MergedGlobals_x,800,2
-;CHECK-APPLE-IOS: .set _x, __MergedGlobals_x
-;CHECK-APPLE-IOS: .set _y, __MergedGlobals_x+400
+;CHECK-APPLE-IOS: _x = __MergedGlobals_x
+;CHECK-APPLE-IOS: _y = __MergedGlobals_x+400
;CHECK: .type .L_MergedGlobals, at object // @_MergedGlobals
;CHECK: .local .L_MergedGlobals
;CHECK: .comm .L_MergedGlobals,800,4
;CHECK: globl x
-;CHECK: .set x, .L_MergedGlobals
+;CHECK: x = .L_MergedGlobals
;CHECK: globl y
-;CHECK: .set y, .L_MergedGlobals+400
-;CHECK-NOT: .set z, .L_MergedGlobals
+;CHECK: y = .L_MergedGlobals+400
+;CHECK-NOT: z = .L_MergedGlobals
diff --git a/llvm/test/CodeGen/AArch64/global-merge-hidden-minsize.ll b/llvm/test/CodeGen/AArch64/global-merge-hidden-minsize.ll
index 9c694fc4d289c..5292aa91fc381 100644
--- a/llvm/test/CodeGen/AArch64/global-merge-hidden-minsize.ll
+++ b/llvm/test/CodeGen/AArch64/global-merge-hidden-minsize.ll
@@ -16,10 +16,10 @@ attributes #0 = { minsize optsize }
; CHECK: .globl x
; CHECK: .hidden x
-; CHECK: .set x, .L_MergedGlobals
+; CHECK: x = .L_MergedGlobals
; CHECK: .size x, 4
; CHECK: .globl y
; CHECK: .hidden y
-; CHECK: .set y, .L_MergedGlobals+4
+; CHECK: y = .L_MergedGlobals+4
; CHECK: .size y, 4
diff --git a/llvm/test/CodeGen/AArch64/ifunc-asm.ll b/llvm/test/CodeGen/AArch64/ifunc-asm.ll
index 57fc2f0c9d7f5..7aad6cce09cf2 100644
--- a/llvm/test/CodeGen/AArch64/ifunc-asm.ll
+++ b/llvm/test/CodeGen/AArch64/ifunc-asm.ll
@@ -16,7 +16,7 @@ entry:
@global_ifunc = ifunc i32 (i32), ptr @the_resolver
; ELF: .globl global_ifunc
; ELF-NEXT: .type global_ifunc, at gnu_indirect_function
-; ELF-NEXT: .set global_ifunc, the_resolver
+; ELF-NEXT: global_ifunc = the_resolver
; MACHO: .section __DATA,__data
; MACHO-NEXT: .p2align 3, 0x0
diff --git a/llvm/test/CodeGen/AArch64/seh-finally.ll b/llvm/test/CodeGen/AArch64/seh-finally.ll
index 04a30800d9294..fd6b3fd0bc1fc 100644
--- a/llvm/test/CodeGen/AArch64/seh-finally.ll
+++ b/llvm/test/CodeGen/AArch64/seh-finally.ll
@@ -38,7 +38,7 @@ entry:
; CHECK: add x29, sp, #16
; CHECK: mov x0, #-2
; CHECK: stur x0, [x29, #16]
-; CHECK: .set .Lsimple_seh$frame_escape_0, -8
+; CHECK: .Lsimple_seh$frame_escape_0 = -8
; CHECK: ldur w0, [x29, #-8]
; CHECK: bl foo
@@ -89,7 +89,7 @@ entry:
; CHECK: mov x19, sp
; CHECK: mov x0, #-2
; CHECK: stur x0, [x29, #24]
-; CHECK: .set .Lstack_realign$frame_escape_0, 0
+; CHECK: .Lstack_realign$frame_escape_0 = 0
; CHECK: ldr w0, [x19]
; CHECK: bl foo
@@ -137,7 +137,7 @@ entry:
; CHECK: add x29, sp, #32
; CHECK: mov x1, #-2
; CHECK: stur x1, [x29, #16]
-; CHECK: .set .Lvla_present$frame_escape_0, -4
+; CHECK: .Lvla_present$frame_escape_0 = -4
; CHECK: stur w0, [x29, #-4]
; CHECK: ldur w8, [x29, #-4]
; CHECK: mov x9, sp
@@ -204,7 +204,7 @@ entry:
; CHECK: mov x19, sp
; CHECK: mov x1, #-2
; CHECK: stur x1, [x29, #24]
-; CHECK: .set .Lvla_and_realign$frame_escape_0, 32
+; CHECK: .Lvla_and_realign$frame_escape_0 = 32
; CHECK: str w0, [x29, #36]
; CHECK: ldr w8, [x29, #36]
; CHECK: mov x9, sp
diff --git a/llvm/test/CodeGen/AArch64/stackguard-internal.ll b/llvm/test/CodeGen/AArch64/stackguard-internal.ll
index a70c8874edbac..7b32e8c0caab5 100644
--- a/llvm/test/CodeGen/AArch64/stackguard-internal.ll
+++ b/llvm/test/CodeGen/AArch64/stackguard-internal.ll
@@ -6,7 +6,7 @@ target triple = "aarch64-linux-gnu"
; is an alias. (The alias is created by GlobalMerge.)
; CHECK: adrp {{.*}}, __stack_chk_guard
; CHECK: ldr {{.*}}, [{{.*}}, :lo12:__stack_chk_guard]
-; CHECK: .set __stack_chk_guard, .L_MergedGlobals+4
+; CHECK: __stack_chk_guard = .L_MergedGlobals+4
@__stack_chk_guard = internal global [8 x i32] zeroinitializer, align 4
@x = internal global i32 0, align 4
diff --git a/llvm/test/CodeGen/ARM/alias_store.ll b/llvm/test/CodeGen/ARM/alias_store.ll
index c6612334eaf1b..60aa58d37499c 100644
--- a/llvm/test/CodeGen/ARM/alias_store.ll
+++ b/llvm/test/CodeGen/ARM/alias_store.ll
@@ -13,4 +13,4 @@ entry:
; CHECK: ldr r{{.*}}, [[L:.*]]
; CHECK: [[L]]:
; CHECK-NEXT: .long XA
-; CHECK: .set XA, X+1
+; CHECK: XA = X+1
diff --git a/llvm/test/CodeGen/ARM/aliases.ll b/llvm/test/CodeGen/ARM/aliases.ll
index 6075ad813e990..8d9f938155d15 100644
--- a/llvm/test/CodeGen/ARM/aliases.ll
+++ b/llvm/test/CodeGen/ARM/aliases.ll
@@ -6,30 +6,30 @@
; CHECK: .size .Lstructvar, 8
; CHECK: .globl foo1
-; CHECK: .set foo1, bar
+; CHECK: foo1 = bar
; CHECK-NOT: .size foo1
; CHECK: .globl foo2
-; CHECK: .set foo2, bar
+; CHECK: foo2 = bar
; CHECK-NOT: .size foo2
; CHECK: .weak bar_f
-; CHECK: .set bar_f, foo_f
+; CHECK: bar_f = foo_f
; CHECK-NOT: .size bar_f
-; CHECK: .set bar_i, bar
+; CHECK: bar_i = bar
; CHECK-NOT: .size bar_i
; CHECK: .globl A
-; CHECK: .set A, bar
+; CHECK: A = bar
; CHECK-NOT: .size A
; CHECK: .globl elem0
-; CHECK: .set elem0, .Lstructvar
+; CHECK: elem0 = .Lstructvar
; CHECK: .size elem0, 4
; CHECK: .globl elem1
-; CHECK: .set elem1, .Lstructvar+4
+; CHECK: elem1 = .Lstructvar+4
; CHECK: .size elem1, 4
@bar = global i32 42
diff --git a/llvm/test/CodeGen/ARM/global-merge-dllexport.ll b/llvm/test/CodeGen/ARM/global-merge-dllexport.ll
index 89e8a859b9393..f5961d7f79e3d 100644
--- a/llvm/test/CodeGen/ARM/global-merge-dllexport.ll
+++ b/llvm/test/CodeGen/ARM/global-merge-dllexport.ll
@@ -16,6 +16,6 @@ define void @f1(i32 %a1, i32 %a2) {
; CHECK: .section .drectve,"yni"
; CHECK: .ascii " /EXPORT:y,DATA"
; CHECK: .globl x
-; CHECK: .set x, .L_MergedGlobals
+; CHECK: x = .L_MergedGlobals
; CHECK: .globl y
-; CHECK: .set y, .L_MergedGlobals+4
+; CHECK: y = .L_MergedGlobals+4
diff --git a/llvm/test/CodeGen/ARM/global-merge-external-2.ll b/llvm/test/CodeGen/ARM/global-merge-external-2.ll
index 602533e045e0b..c9e92d98e4841 100644
--- a/llvm/test/CodeGen/ARM/global-merge-external-2.ll
+++ b/llvm/test/CodeGen/ARM/global-merge-external-2.ll
@@ -50,16 +50,16 @@ define dso_local void @g1(i32 %a1, i32 %a2) {
;CHECK-WIN32: .lcomm .L_MergedGlobals,8,4
;CHECK-MERGE: .globl x
-;CHECK-MERGE: .set x, .L_MergedGlobals
+;CHECK-MERGE: x = .L_MergedGlobals
;CHECK-MERGE: .size x, 4
;CHECK-MERGE: .globl y
-;CHECK-MERGE: .set y, .L_MergedGlobals+4
+;CHECK-MERGE: y = .L_MergedGlobals+4
;CHECK-MERGE: .size y, 4
-;CHECK-MERGE-NOT: .set z, .L_MergedGlobals+8
+;CHECK-MERGE-NOT: z = .L_MergedGlobals+8
;CHECK-WIN32: .globl x
-;CHECK-WIN32: .set x, .L_MergedGlobals
+;CHECK-WIN32: x = .L_MergedGlobals
;CHECK-WIN32: .globl y
-;CHECK-WIN32: .set y, .L_MergedGlobals+4
-;CHECK-WIN32-NOT: .set z, .L_MergedGlobals+8
+;CHECK-WIN32: y = .L_MergedGlobals+4
+;CHECK-WIN32-NOT: z = .L_MergedGlobals+8
diff --git a/llvm/test/CodeGen/ARM/global-merge-external.ll b/llvm/test/CodeGen/ARM/global-merge-external.ll
index 364659b36bb9a..4fe1914aae351 100644
--- a/llvm/test/CodeGen/ARM/global-merge-external.ll
+++ b/llvm/test/CodeGen/ARM/global-merge-external.ll
@@ -45,18 +45,18 @@ define dso_local void @g1(i32 %a1, i32 %a2) {
;CHECK-WIN32: .lcomm .L_MergedGlobals,12,4
;CHECK-MERGE: .globl x
-;CHECK-MERGE: .set x, .L_MergedGlobals
+;CHECK-MERGE: x = .L_MergedGlobals
;CHECK-MERGE: .size x, 4
;CHECK-MERGE: .globl y
-;CHECK-MERGE: .set y, .L_MergedGlobals+4
+;CHECK-MERGE: y = .L_MergedGlobals+4
;CHECK-MERGE: .size y, 4
;CHECK-MERGE: .globl z
-;CHECK-MERGE: .set z, .L_MergedGlobals+8
+;CHECK-MERGE: z = .L_MergedGlobals+8
;CHECK-MERGE: .size z, 4
;CHECK-WIN32: .globl x
-;CHECK-WIN32: .set x, .L_MergedGlobals
+;CHECK-WIN32: x = .L_MergedGlobals
;CHECK-WIN32: .globl y
-;CHECK-WIN32: .set y, .L_MergedGlobals+4
+;CHECK-WIN32: y = .L_MergedGlobals+4
;CHECK-WIN32: .globl z
-;CHECK-WIN32: .set z, .L_MergedGlobals+8
+;CHECK-WIN32: z = .L_MergedGlobals+8
diff --git a/llvm/test/CodeGen/AVR/global-aliases.ll b/llvm/test/CodeGen/AVR/global-aliases.ll
index 91bcedc7e0dba..b948003e8b88d 100644
--- a/llvm/test/CodeGen/AVR/global-aliases.ll
+++ b/llvm/test/CodeGen/AVR/global-aliases.ll
@@ -1,18 +1,18 @@
; RUN: llc < %s -mtriple=avr -mcpu=atxmega384c3 | FileCheck %s --check-prefixes=MEGA
; RUN: llc < %s -mtriple=avr -mcpu=attiny40 | FileCheck %s --check-prefixes=TINY
-; MEGA: .set __tmp_reg__, 0
-; MEGA: .set __zero_reg__, 1
-; MEGA: .set __SREG__, 63
-; MEGA: .set __SP_H__, 62
-; MEGA: .set __SP_L__, 61
-; MEGA: .set __EIND__, 60
-; MEGA: .set __RAMPZ__, 59
+; MEGA: __tmp_reg__ = 0
+; MEGA: __zero_reg__ = 1
+; MEGA: __SREG__ = 63
+; MEGA: __SP_H__ = 62
+; MEGA: __SP_L__ = 61
+; MEGA: __EIND__ = 60
+; MEGA: __RAMPZ__ = 59
-; TINY: .set __tmp_reg__, 16
-; TINY: .set __zero_reg__, 17
-; TINY: .set __SREG__, 63
-; TINY-NOT: .set __SP_H__, 62
-; TINY: .set __SP_L__, 61
-; TINY-NOT: .set __EIND__, 60
-; TINY-NOT: .set __RAMPZ__, 59
+; TINY: __tmp_reg__ = 16
+; TINY: __zero_reg__ = 17
+; TINY: __SREG__ = 63
+; TINY-NOT: __SP_H__ = 62
+; TINY: __SP_L__ = 61
+; TINY-NOT: __EIND__ = 60
+; TINY-NOT: __RAMPZ__ = 59
diff --git a/llvm/test/CodeGen/Mips/hf16call32_body.ll b/llvm/test/CodeGen/Mips/hf16call32_body.ll
index ea83f776bd40f..3bcb6f6bc0152 100644
--- a/llvm/test/CodeGen/Mips/hf16call32_body.ll
+++ b/llvm/test/CodeGen/Mips/hf16call32_body.ll
@@ -24,7 +24,7 @@ entry:
; stel: addiu $25, $25, %lo(v_sf)
; stel: mfc1 $4, $f12
; stel: jr $25
-; stel: .set $__fn_local_v_sf, v_sf
+; stel: $__fn_local_v_sf = v_sf
; stel: .end __fn_stub_v_sf
declare i32 @printf(ptr, ...) #1
@@ -46,7 +46,7 @@ entry:
; stel: mfc1 $4, $f12
; stel: mfc1 $5, $f13
; stel: jr $25
-; stel: .set $__fn_local_v_df, v_df
+; stel: $__fn_local_v_df = v_df
; stel: .end __fn_stub_v_df
; Function Attrs: nounwind
@@ -70,7 +70,7 @@ entry:
; stel: mfc1 $4, $f12
; stel: mfc1 $5, $f14
; stel: jr $25
-; stel: .set $__fn_local_v_sf_sf, v_sf_sf
+; stel: $__fn_local_v_sf_sf = v_sf_sf
; stel: .end __fn_stub_v_sf_sf
; Function Attrs: nounwind
@@ -95,7 +95,7 @@ entry:
; stel: mfc1 $6, $f14
; stel: mfc1 $7, $f15
; stel: jr $25
-; stel: .set $__fn_local_v_sf_df, v_sf_df
+; stel: $__fn_local_v_sf_df = v_sf_df
; stel: .end __fn_stub_v_sf_df
; Function Attrs: nounwind
@@ -120,7 +120,7 @@ entry:
; stel: mfc1 $5, $f13
; stel: mfc1 $6, $f14
; stel: jr $25
-; stel: .set $__fn_local_v_df_sf, v_df_sf
+; stel: $__fn_local_v_df_sf = v_df_sf
; stel: .end __fn_stub_v_df_sf
; Function Attrs: nounwind
@@ -146,7 +146,7 @@ entry:
; stel: mfc1 $6, $f14
; stel: mfc1 $7, $f15
; stel: jr $25
-; stel: .set $__fn_local_v_df_df, v_df_df
+; stel: $__fn_local_v_df_df = v_df_df
; stel: .end __fn_stub_v_df_df
; Function Attrs: nounwind
@@ -174,7 +174,7 @@ entry:
; stel: addiu $25, $25, %lo(sf_sf)
; stel: mfc1 $4, $f12
; stel: jr $25
-; stel: .set $__fn_local_sf_sf, sf_sf
+; stel: $__fn_local_sf_sf = sf_sf
; stel: .end __fn_stub_sf_sf
@@ -196,7 +196,7 @@ entry:
; stel: mfc1 $4, $f12
; stel: mfc1 $5, $f13
; stel: jr $25
-; stel: .set $__fn_local_sf_df, sf_df
+; stel: $__fn_local_sf_df = sf_df
; stel: .end __fn_stub_sf_df
; Function Attrs: nounwind
@@ -221,7 +221,7 @@ entry:
; stel: mfc1 $4, $f12
; stel: mfc1 $5, $f14
; stel: jr $25
-; stel: .set $__fn_local_sf_sf_sf, sf_sf_sf
+; stel: $__fn_local_sf_sf_sf = sf_sf_sf
; stel: .end __fn_stub_sf_sf_sf
; Function Attrs: nounwind
@@ -247,7 +247,7 @@ entry:
; stel: mfc1 $6, $f14
; stel: mfc1 $7, $f15
; stel: jr $25
-; stel: .set $__fn_local_sf_sf_df, sf_sf_df
+; stel: $__fn_local_sf_sf_df = sf_sf_df
; stel: .end __fn_stub_sf_sf_df
; Function Attrs: nounwind
@@ -273,7 +273,7 @@ entry:
; stel: mfc1 $5, $f13
; stel: mfc1 $6, $f14
; stel: jr $25
-; stel: .set $__fn_local_sf_df_sf, sf_df_sf
+; stel: $__fn_local_sf_df_sf = sf_df_sf
; stel: .end __fn_stub_sf_df_sf
; Function Attrs: nounwind
@@ -300,7 +300,7 @@ entry:
; stel: mfc1 $6, $f14
; stel: mfc1 $7, $f15
; stel: jr $25
-; stel: .set $__fn_local_sf_df_df, sf_df_df
+; stel: $__fn_local_sf_df_df = sf_df_df
; stel: .end __fn_stub_sf_df_df
attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
diff --git a/llvm/test/CodeGen/Mips/mips16ex.ll b/llvm/test/CodeGen/Mips/mips16ex.ll
index fb9a44e767516..f4d1125718a9a 100644
--- a/llvm/test/CodeGen/Mips/mips16ex.ll
+++ b/llvm/test/CodeGen/Mips/mips16ex.ll
@@ -2,7 +2,7 @@
;16: main:
;16-NEXT: [[TMP:.*]]:
-;16-NEXT: .set $func_begin0, [[TMP]]
+;16-NEXT: $func_begin0 = [[TMP]]
;16-NEXT: .cfi_startproc
;16-NEXT: .cfi_personality
@.str = private unnamed_addr constant [7 x i8] c"hello\0A\00", align 1
diff --git a/llvm/test/CodeGen/PowerPC/asm-printer-topological-order.ll b/llvm/test/CodeGen/PowerPC/asm-printer-topological-order.ll
index 6299b4e393d9e..3218c77f08c80 100644
--- a/llvm/test/CodeGen/PowerPC/asm-printer-topological-order.ll
+++ b/llvm/test/CodeGen/PowerPC/asm-printer-topological-order.ll
@@ -10,6 +10,6 @@ entry:
}
; CHECK-LABEL: TestD:
-; CHECK: .set TestC, TestD
-; CHECK-DAG: .set TestB, TestC
-; CHECK-DAG: .set TestA, TestC
+; CHECK: TestC = TestD
+; CHECK-DAG: TestB = TestC
+; CHECK-DAG: TestA = TestC
diff --git a/llvm/test/CodeGen/PowerPC/data-align.ll b/llvm/test/CodeGen/PowerPC/data-align.ll
index bfedec139369c..42dee13d152a9 100644
--- a/llvm/test/CodeGen/PowerPC/data-align.ll
+++ b/llvm/test/CodeGen/PowerPC/data-align.ll
@@ -2,23 +2,23 @@
; RUN: llc < %s -mtriple=powerpc64-unknown-linux | FileCheck %s
; RUN: llc < %s -mtriple=powerpc64le-unknown-linux | FileCheck %s
-; CHECK: .set .Li8,
+; CHECK: .Li8 =
; CHECK-NEXT: .size .Li8, 1
@i8 = private constant i8 42
-; CHECK: .set .Li16,
+; CHECK: .Li16 =
; CHECK-NEXT: .size .Li16, 2
@i16 = private constant i16 42
-; CHECK: .set .Li32,
+; CHECK: .Li32 =
; CHECK-NEXT: .size .Li32, 4
@i32 = private constant i32 42
-; CHECK: .set .Li64,
+; CHECK: .Li64 =
; CHECK-NEXT: .size .Li64, 8
@i64 = private constant i64 42
-; CHECK: .set .Li128,
+; CHECK: .Li128 =
; CHECK-NEXT: .size .Li128, 16
@i128 = private constant i128 42
diff --git a/llvm/test/CodeGen/WebAssembly/aliases.ll b/llvm/test/CodeGen/WebAssembly/aliases.ll
index 91b57b90df1d6..87b292f53c625 100644
--- a/llvm/test/CodeGen/WebAssembly/aliases.ll
+++ b/llvm/test/CodeGen/WebAssembly/aliases.ll
@@ -4,11 +4,11 @@
@bar = global i32 42
; CHECK-DAG: .globl foo1
-; CHECK-DAG: .set foo1, bar
+; CHECK-DAG: foo1 = bar
@foo1 = alias i32, ptr @bar
; CHECK-DAG: .globl foo2
-; CHECK-DAG: .set foo2, bar
+; CHECK-DAG: foo2 = bar
@foo2 = alias i32, ptr @bar
%FunTy = type i32()
@@ -19,14 +19,14 @@ define i32 @foo_f() {
; CHECK-DAG: .weak bar_f
; CHECK-DAG: .type bar_f, at function
-; CHECK-DAG: .set bar_f, foo_f
+; CHECK-DAG: bar_f = foo_f
@bar_f = weak alias %FunTy, ptr @foo_f
; CHECK-DAG: .weak bar_l
-; CHECK-DAG: .set bar_l, bar
+; CHECK-DAG: bar_l = bar
@bar_l = linkonce_odr alias i32, ptr @bar
-; CHECK-DAG: .set bar_i, bar
+; CHECK-DAG: bar_i = bar
@bar_i = internal alias i32, ptr @bar
; CHECK-DAG: .globl A
@@ -34,24 +34,24 @@ define i32 @foo_f() {
; CHECK-DAG: .globl bar_h
; CHECK-DAG: .hidden bar_h
-; CHECK-DAG: .set bar_h, bar
+; CHECK-DAG: bar_h = bar
@bar_h = hidden alias i32, ptr @bar
; CHECK-DAG: .globl bar_p
; CHECK-DAG: .protected bar_p
-; CHECK-DAG: .set bar_p, bar
+; CHECK-DAG: bar_p = bar
@bar_p = protected alias i32, ptr @bar
-; CHECK-DAG: .set test2, bar+4
+; CHECK-DAG: test2 = bar+4
@test2 = alias i32, getelementptr(i32, ptr @bar, i32 1)
-; CHECK-DAG: .set test3, 42
+; CHECK-DAG: test3 = 42
@test3 = alias i32, inttoptr(i32 42 to ptr)
-; CHECK-DAG: .set test4, bar
+; CHECK-DAG: test4 = bar
@test4 = alias i32, inttoptr(i64 ptrtoint (ptr @bar to i64) to ptr)
-; CHECK-DAG: .set test5, test2-bar
+; CHECK-DAG: test5 = test2-bar
@test5 = alias i32, inttoptr(i32 sub (i32 ptrtoint (ptr @test2 to i32),
i32 ptrtoint (ptr @bar to i32)) to ptr)
diff --git a/llvm/test/CodeGen/WinCFGuard/cfguard-mingw.ll b/llvm/test/CodeGen/WinCFGuard/cfguard-mingw.ll
index 7a5baa09f95e9..10985de88bf2e 100644
--- a/llvm/test/CodeGen/WinCFGuard/cfguard-mingw.ll
+++ b/llvm/test/CodeGen/WinCFGuard/cfguard-mingw.ll
@@ -35,7 +35,7 @@
; }
;-------------------------------------------------------------------------------
-; CHECK: .set @feat.00, 2048
+; CHECK: @feat.00 = 2048
; CHECK: .section .gfids$y
; CHECK: .symidx _ZNK7Derived4calcEv
diff --git a/llvm/test/CodeGen/WinCFGuard/cfguard.ll b/llvm/test/CodeGen/WinCFGuard/cfguard.ll
index 2ec2e573f7164..a77d5490ef876 100644
--- a/llvm/test/CodeGen/WinCFGuard/cfguard.ll
+++ b/llvm/test/CodeGen/WinCFGuard/cfguard.ll
@@ -1,7 +1,7 @@
; RUN: llc < %s -mtriple=x86_64-pc-windows-msvc | FileCheck %s
; Control Flow Guard is currently only available on Windows
-; CHECK: .set @feat.00, 2048
+; CHECK: @feat.00 = 2048
; CHECK: .section .gfids$y
; CHECK: .symidx "?address_taken@@YAXXZ"
diff --git a/llvm/test/CodeGen/X86/2007-09-06-ExtWeakAliasee.ll b/llvm/test/CodeGen/X86/2007-09-06-ExtWeakAliasee.ll
index d59953fb4e37d..cc80f87fda311 100644
--- a/llvm/test/CodeGen/X86/2007-09-06-ExtWeakAliasee.ll
+++ b/llvm/test/CodeGen/X86/2007-09-06-ExtWeakAliasee.ll
@@ -10,4 +10,4 @@ define weak i32 @pthread_once(ptr, ptr) {
; CHECK: pthread_once:
; CHECK: .weak __gthrw_pthread_once
-; CHECK: .set __gthrw_pthread_once, pthread_once
+; CHECK: __gthrw_pthread_once = pthread_once
diff --git a/llvm/test/CodeGen/X86/2009-08-12-badswitch.ll b/llvm/test/CodeGen/X86/2009-08-12-badswitch.ll
index 7050889d71029..527684f5a27db 100644
--- a/llvm/test/CodeGen/X86/2009-08-12-badswitch.ll
+++ b/llvm/test/CodeGen/X86/2009-08-12-badswitch.ll
@@ -125,31 +125,31 @@ define internal fastcc i32 @foo(i64 %bar) nounwind ssp {
; CHECK-NEXT: retq
; CHECK-NEXT: .p2align 2
; CHECK-NEXT: .data_region jt32
-; CHECK-NEXT: .set L0_0_set_3, LBB0_3-LJTI0_0
-; CHECK-NEXT: .set L0_0_set_4, LBB0_4-LJTI0_0
-; CHECK-NEXT: .set L0_0_set_5, LBB0_5-LJTI0_0
-; CHECK-NEXT: .set L0_0_set_6, LBB0_6-LJTI0_0
-; CHECK-NEXT: .set L0_0_set_7, LBB0_7-LJTI0_0
-; CHECK-NEXT: .set L0_0_set_8, LBB0_8-LJTI0_0
-; CHECK-NEXT: .set L0_0_set_9, LBB0_9-LJTI0_0
-; CHECK-NEXT: .set L0_0_set_10, LBB0_10-LJTI0_0
-; CHECK-NEXT: .set L0_0_set_11, LBB0_11-LJTI0_0
-; CHECK-NEXT: .set L0_0_set_12, LBB0_12-LJTI0_0
-; CHECK-NEXT: .set L0_0_set_13, LBB0_13-LJTI0_0
-; CHECK-NEXT: .set L0_0_set_14, LBB0_14-LJTI0_0
-; CHECK-NEXT: .set L0_0_set_15, LBB0_15-LJTI0_0
-; CHECK-NEXT: .set L0_0_set_16, LBB0_16-LJTI0_0
-; CHECK-NEXT: .set L0_0_set_17, LBB0_17-LJTI0_0
-; CHECK-NEXT: .set L0_0_set_18, LBB0_18-LJTI0_0
-; CHECK-NEXT: .set L0_0_set_19, LBB0_19-LJTI0_0
-; CHECK-NEXT: .set L0_0_set_20, LBB0_20-LJTI0_0
-; CHECK-NEXT: .set L0_0_set_21, LBB0_21-LJTI0_0
-; CHECK-NEXT: .set L0_0_set_22, LBB0_22-LJTI0_0
-; CHECK-NEXT: .set L0_0_set_23, LBB0_23-LJTI0_0
-; CHECK-NEXT: .set L0_0_set_24, LBB0_24-LJTI0_0
-; CHECK-NEXT: .set L0_0_set_25, LBB0_25-LJTI0_0
-; CHECK-NEXT: .set L0_0_set_26, LBB0_26-LJTI0_0
-; CHECK-NEXT: .set L0_0_set_27, LBB0_27-LJTI0_0
+; CHECK-NEXT: L0_0_set_3 = LBB0_3-LJTI0_0
+; CHECK-NEXT: L0_0_set_4 = LBB0_4-LJTI0_0
+; CHECK-NEXT: L0_0_set_5 = LBB0_5-LJTI0_0
+; CHECK-NEXT: L0_0_set_6 = LBB0_6-LJTI0_0
+; CHECK-NEXT: L0_0_set_7 = LBB0_7-LJTI0_0
+; CHECK-NEXT: L0_0_set_8 = LBB0_8-LJTI0_0
+; CHECK-NEXT: L0_0_set_9 = LBB0_9-LJTI0_0
+; CHECK-NEXT: L0_0_set_10 = LBB0_10-LJTI0_0
+; CHECK-NEXT: L0_0_set_11 = LBB0_11-LJTI0_0
+; CHECK-NEXT: L0_0_set_12 = LBB0_12-LJTI0_0
+; CHECK-NEXT: L0_0_set_13 = LBB0_13-LJTI0_0
+; CHECK-NEXT: L0_0_set_14 = LBB0_14-LJTI0_0
+; CHECK-NEXT: L0_0_set_15 = LBB0_15-LJTI0_0
+; CHECK-NEXT: L0_0_set_16 = LBB0_16-LJTI0_0
+; CHECK-NEXT: L0_0_set_17 = LBB0_17-LJTI0_0
+; CHECK-NEXT: L0_0_set_18 = LBB0_18-LJTI0_0
+; CHECK-NEXT: L0_0_set_19 = LBB0_19-LJTI0_0
+; CHECK-NEXT: L0_0_set_20 = LBB0_20-LJTI0_0
+; CHECK-NEXT: L0_0_set_21 = LBB0_21-LJTI0_0
+; CHECK-NEXT: L0_0_set_22 = LBB0_22-LJTI0_0
+; CHECK-NEXT: L0_0_set_23 = LBB0_23-LJTI0_0
+; CHECK-NEXT: L0_0_set_24 = LBB0_24-LJTI0_0
+; CHECK-NEXT: L0_0_set_25 = LBB0_25-LJTI0_0
+; CHECK-NEXT: L0_0_set_26 = LBB0_26-LJTI0_0
+; CHECK-NEXT: L0_0_set_27 = LBB0_27-LJTI0_0
; CHECK-NEXT: LJTI0_0:
; CHECK-NEXT: .long L0_0_set_3
; CHECK-NEXT: .long L0_0_set_3
diff --git a/llvm/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll b/llvm/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll
index cf20cfaced5d0..17df3e10fd3d9 100644
--- a/llvm/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll
+++ b/llvm/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll
@@ -64,15 +64,15 @@ attributes #1 = { nounwind readnone }
; CHECK-NEXT: [[CLOBBER:Ltmp[0-9]*]]
; CHECK: Ldebug_loc0:
-; CHECK-NEXT: .set [[SET1:.*]], Lfunc_begin0-Lfunc_begin0
+; CHECK-NEXT: [[SET1:.*]] = Lfunc_begin0-Lfunc_begin0
; CHECK-NEXT: .quad [[SET1]]
-; CHECK-NEXT: .set [[SET2:.*]], [[LABEL]]-Lfunc_begin0
+; CHECK-NEXT: [[SET2:.*]] = [[LABEL]]-Lfunc_begin0
; CHECK-NEXT: .quad [[SET2]]
; CHECK-NEXT: .short 1 ## Loc expr size
; CHECK-NEXT: .byte 85
-; CHECK-NEXT: .set [[SET3:.*]], [[LABEL]]-Lfunc_begin0
+; CHECK-NEXT: [[SET3:.*]] = [[LABEL]]-Lfunc_begin0
; CHECK-NEXT: .quad [[SET3]]
-; CHECK-NEXT: .set [[SET4:.*]], [[CLOBBER]]-Lfunc_begin0
+; CHECK-NEXT: [[SET4:.*]] = [[CLOBBER]]-Lfunc_begin0
; CHECK-NEXT: .quad [[SET4]]
; CHECK-NEXT: .short 1 ## Loc expr size
; CHECK-NEXT: .byte 83
diff --git a/llvm/test/CodeGen/X86/alias-gep.ll b/llvm/test/CodeGen/X86/alias-gep.ll
index 904a611f61d1c..65d2ced6df5ba 100644
--- a/llvm/test/CodeGen/X86/alias-gep.ll
+++ b/llvm/test/CodeGen/X86/alias-gep.ll
@@ -3,17 +3,17 @@
;MACHO: .globl _offsetSym0
;MACHO-NOT: .alt_entry
-;MACHO: .set _offsetSym0, _s
+;MACHO: _offsetSym0 = _s
;MACHO: .globl _offsetSym1
;MACHO: .alt_entry _offsetSym1
-;MACHO: .set _offsetSym1, _s+8
+;MACHO: _offsetSym1 = _s+8
;ELF: .globl offsetSym0
;ELF-NOT: .alt_entry
-;ELF: .set offsetSym0, s
+;ELF: offsetSym0 = s
;ELF: .globl offsetSym1
;ELF-NOT: .alt_entry
-;ELF: .set offsetSym1, s+8
+;ELF: offsetSym1 = s+8
%struct.S1 = type { i32, i32, i32 }
diff --git a/llvm/test/CodeGen/X86/aliases.ll b/llvm/test/CodeGen/X86/aliases.ll
index 03ea2579d0f8a..d36798820fe83 100644
--- a/llvm/test/CodeGen/X86/aliases.ll
+++ b/llvm/test/CodeGen/X86/aliases.ll
@@ -48,16 +48,16 @@ define i32 @foo_f() {
; CHECK-DAG: .protected bar_p
@bar_p = protected alias i32, ptr @bar
-; CHECK-DAG: .set test2, bar+4
+; CHECK-DAG: test2 = bar+4
@test2 = alias i32, getelementptr(i32, ptr @bar, i32 1)
-; CHECK-DAG: .set test3, 42
+; CHECK-DAG: test3 = 42
@test3 = alias i32, inttoptr(i32 42 to ptr)
-; CHECK-DAG: .set test4, bar
+; CHECK-DAG: test4 = bar
@test4 = alias i32, inttoptr(i64 ptrtoint (ptr @bar to i64) to ptr)
-; CHECK-DAG: .set test5, test2-bar
+; CHECK-DAG: test5 = test2-bar
@test5 = alias i32, inttoptr(i32 sub (i32 ptrtoint (ptr @test2 to i32),
i32 ptrtoint (ptr @bar to i32)) to ptr)
diff --git a/llvm/test/CodeGen/X86/catchret-empty-fallthrough.ll b/llvm/test/CodeGen/X86/catchret-empty-fallthrough.ll
index 437d9698ee6bd..ab9fa2287ffad 100644
--- a/llvm/test/CodeGen/X86/catchret-empty-fallthrough.ll
+++ b/llvm/test/CodeGen/X86/catchret-empty-fallthrough.ll
@@ -44,7 +44,7 @@ return: ; preds = %catch, %entry
; CHECK: .LBB0_[[catch:[0-9]+]]:
; CHECK: .seh_handlerdata
-; CHECK-NEXT: .set .Lfoo$parent_frame_offset, 32
+; CHECK-NEXT: .Lfoo$parent_frame_offset = 32
; CHECK-NEXT: .long (.Llsda_end0-.Llsda_begin0)/16
; CHECK-NEXT: .Llsda_begin0:
; CHECK-NEXT: .long .Ltmp0 at IMGREL
diff --git a/llvm/test/CodeGen/X86/coff-alias-type.ll b/llvm/test/CodeGen/X86/coff-alias-type.ll
index a242cd2d77d7c..6cc0638b2d4af 100644
--- a/llvm/test/CodeGen/X86/coff-alias-type.ll
+++ b/llvm/test/CodeGen/X86/coff-alias-type.ll
@@ -22,4 +22,4 @@ entry:
; CHECK-NEXT: .scl 2
; CHECK-NEXT: .type 32
; CHECK-NEXT: .endef
-; CHECK-NEXT: .set _ZN8MyStructC1Ev, _ZN8MyStructC2Ev
+; CHECK-NEXT: _ZN8MyStructC1Ev = _ZN8MyStructC2Ev
diff --git a/llvm/test/CodeGen/X86/coff-comdat.ll b/llvm/test/CodeGen/X86/coff-comdat.ll
index 99b3c0a687afb..084a5a71125ee 100644
--- a/llvm/test/CodeGen/X86/coff-comdat.ll
+++ b/llvm/test/CodeGen/X86/coff-comdat.ll
@@ -89,4 +89,4 @@ $vftable = comdat largest
; CHECK: .globl _f6
; CHECK: .section .rdata,"dr",largest,_vftable
; CHECK: .globl _vftable
-; CHECK: .set _vftable, L_some_name+4
+; CHECK: _vftable = L_some_name+4
diff --git a/llvm/test/CodeGen/X86/coff-feat00.ll b/llvm/test/CodeGen/X86/coff-feat00.ll
index 21dd04ed34c7e..1dcd4276399a9 100644
--- a/llvm/test/CodeGen/X86/coff-feat00.ll
+++ b/llvm/test/CodeGen/X86/coff-feat00.ll
@@ -4,4 +4,4 @@ define i32 @foo() {
ret i32 0
}
-; CHECK: .set @feat.00, 1
+; CHECK: @feat.00 = 1
diff --git a/llvm/test/CodeGen/X86/dllexport-x86_64.ll b/llvm/test/CodeGen/X86/dllexport-x86_64.ll
index 76add98314f5c..b640e630e47e6 100644
--- a/llvm/test/CodeGen/X86/dllexport-x86_64.ll
+++ b/llvm/test/CodeGen/X86/dllexport-x86_64.ll
@@ -105,23 +105,23 @@ define weak_odr dllexport void @weak1() {
; MINGW: .ascii " -export:blob_alias"
; CHECK: .globl alias
-; CHECK: .set alias, notExported
+; CHECK: alias = notExported
@alias = dllexport alias void(), ptr @notExported
; CHECK: .globl aliasNotExported
-; CHECK: .set aliasNotExported, f1
+; CHECK: aliasNotExported = f1
@aliasNotExported = alias void(), ptr @f1
; CHECK: .globl alias2
-; CHECK: .set alias2, f1
+; CHECK: alias2 = f1
@alias2 = dllexport alias void(), ptr @f1
; CHECK: .globl alias3
-; CHECK: .set alias3, notExported
+; CHECK: alias3 = notExported
@alias3 = dllexport alias void(), ptr @notExported
; CHECK: .weak weak_alias
-; CHECK: .set weak_alias, f1
+; CHECK: weak_alias = f1
@weak_alias = weak_odr dllexport alias void(), ptr @f1
@blob = global [6 x i8] c"\B8*\00\00\00\C3", section ".text", align 16
diff --git a/llvm/test/CodeGen/X86/dllexport.ll b/llvm/test/CodeGen/X86/dllexport.ll
index 09cc03e7729d9..53ecb8e7a1b4f 100644
--- a/llvm/test/CodeGen/X86/dllexport.ll
+++ b/llvm/test/CodeGen/X86/dllexport.ll
@@ -135,17 +135,17 @@ define weak_odr dllexport void @weak1() {
; CHECK-GCC: .ascii " -export:weak_alias"
; CHECK: .globl _alias
-; CHECK: .set _alias, _notExported
+; CHECK: _alias = _notExported
@alias = dllexport alias void(), ptr @notExported
; CHECK: .globl _alias2
-; CHECK: .set _alias2, _f1
+; CHECK: _alias2 = _f1
@alias2 = dllexport alias void(), ptr @f1
; CHECK: .globl _alias3
-; CHECK: .set _alias3, _notExported
+; CHECK: _alias3 = _notExported
@alias3 = dllexport alias void(), ptr @notExported
; CHECK: .weak _weak_alias
-; CHECK: .set _weak_alias, _f1
+; CHECK: _weak_alias = _f1
@weak_alias = weak_odr dllexport alias void(), ptr @f1
diff --git a/llvm/test/CodeGen/X86/ehcontguard.ll b/llvm/test/CodeGen/X86/ehcontguard.ll
index 740621bc5d025..e868209babce6 100644
--- a/llvm/test/CodeGen/X86/ehcontguard.ll
+++ b/llvm/test/CodeGen/X86/ehcontguard.ll
@@ -1,7 +1,7 @@
; RUN: llc < %s -mtriple=x86_64-pc-windows-msvc | FileCheck %s
; EHCont Guard is currently only available on Windows
-; CHECK: .set @feat.00, 16384
+; CHECK: @feat.00 = 16384
; CHECK: .section .gehcont$y
diff --git a/llvm/test/CodeGen/X86/fastcall-correct-mangling.ll b/llvm/test/CodeGen/X86/fastcall-correct-mangling.ll
index 53b4bc8f1df2e..4840308a5d498 100644
--- a/llvm/test/CodeGen/X86/fastcall-correct-mangling.ll
+++ b/llvm/test/CodeGen/X86/fastcall-correct-mangling.ll
@@ -33,5 +33,5 @@ define private x86_fastcallcc void @dontCrash() {
}
@alias = alias void(i64, i8, i8, i16), ptr @func
-; CHECK32-LABEL: {{^}}.set @alias at 20, @func at 20
-; CHECK64-LABEL: {{^}}.set alias, func
+; CHECK32-LABEL: {{^}}@alias at 20 = @func at 20
+; CHECK64-LABEL: {{^}}alias = func
diff --git a/llvm/test/CodeGen/X86/ifunc-asm.ll b/llvm/test/CodeGen/X86/ifunc-asm.ll
index a4c47da7f4c65..bc8e7e3d7d05b 100644
--- a/llvm/test/CodeGen/X86/ifunc-asm.ll
+++ b/llvm/test/CodeGen/X86/ifunc-asm.ll
@@ -15,7 +15,7 @@ entry:
@foo_ifunc = ifunc i32 (i32), ptr @foo_resolver
; ELF: .globl foo_ifunc
; ELF-NEXT: .type foo_ifunc, at gnu_indirect_function
-; ELF-NEXT: .set foo_ifunc, foo_resolver
+; ELF-NEXT: foo_ifunc = foo_resolver
; MACHO: .section __DATA,__data
; MACHO-NEXT: .p2align 3, 0x0
diff --git a/llvm/test/CodeGen/X86/lea-opt-memop-check-1.ll b/llvm/test/CodeGen/X86/lea-opt-memop-check-1.ll
index b8f0661225f82..5199b1519ebea 100644
--- a/llvm/test/CodeGen/X86/lea-opt-memop-check-1.ll
+++ b/llvm/test/CodeGen/X86/lea-opt-memop-check-1.ll
@@ -47,9 +47,9 @@ entry:
call fastcc void @"\01?fin$0 at 0@test2@@"(ptr %tmp0)
ret void
; CHECK-LABEL: test2:
-; CHECK: .set Ltest2$frame_escape_0, 8
-; CHECK: .set Ltest2$frame_escape_1, 4
-; CHECK: .set Ltest2$frame_escape_2, 0
+; CHECK: Ltest2$frame_escape_0 = 8
+; CHECK: Ltest2$frame_escape_1 = 4
+; CHECK: Ltest2$frame_escape_2 = 0
; CHECK: calll "?fin$0 at 0@test2@@"
}
diff --git a/llvm/test/CodeGen/X86/linux-preemption.ll b/llvm/test/CodeGen/X86/linux-preemption.ll
index 8e60b47879754..dc06a34e1c692 100644
--- a/llvm/test/CodeGen/X86/linux-preemption.ll
+++ b/llvm/test/CodeGen/X86/linux-preemption.ll
@@ -285,18 +285,18 @@ define dso_local ptr @comdat_any_local() comdat {
; CHECK-NEXT: .Lstrong_local_global$local:
; COMMON: .globl strong_default_alias
-; COMMON-NEXT: .set strong_default_alias, aliasee
+; COMMON-NEXT: strong_default_alias = aliasee
; COMMON-NEXT: .globl strong_hidden_alias
; COMMON-NEXT: .hidden strong_hidden_alias
-; COMMON-NEXT: .set strong_hidden_alias, aliasee
+; COMMON-NEXT: strong_hidden_alias = aliasee
; COMMON-NEXT: .weak weak_default_alias
-; COMMON-NEXT: .set weak_default_alias, aliasee
+; COMMON-NEXT: weak_default_alias = aliasee
; COMMON-NEXT: .globl strong_local_alias
-; COMMON-NEXT: .set strong_local_alias, aliasee
-; CHECK-NEXT: .set .Lstrong_local_alias$local, aliasee
+; COMMON-NEXT: strong_local_alias = aliasee
+; CHECK-NEXT: .Lstrong_local_alias$local = aliasee
; COMMON-NEXT: .weak weak_local_alias
-; COMMON-NEXT: .set weak_local_alias, aliasee
+; COMMON-NEXT: weak_local_alias = aliasee
; COMMON-NEXT: .globl strong_preemptable_alias
-; COMMON-NEXT: .set strong_preemptable_alias, aliasee
+; COMMON-NEXT: strong_preemptable_alias = aliasee
; COMMON-NEXT: .weak weak_preemptable_alias
-; COMMON-NEXT: .set weak_preemptable_alias, aliasee
+; COMMON-NEXT: weak_preemptable_alias = aliasee
diff --git a/llvm/test/CodeGen/X86/localescape.ll b/llvm/test/CodeGen/X86/localescape.ll
index aee7613273f75..57369be489af3 100644
--- a/llvm/test/CodeGen/X86/localescape.ll
+++ b/llvm/test/CodeGen/X86/localescape.ll
@@ -76,8 +76,8 @@ define void @alloc_func(i32 %n) {
; X64: .seh_stackalloc 16
; X64: leaq 16(%rsp), %rbp
; X64: .seh_setframe %rbp, 16
-; X64: .set .Lalloc_func$frame_escape_0, -4
-; X64: .set .Lalloc_func$frame_escape_1, -12
+; X64: .Lalloc_func$frame_escape_0 = -4
+; X64: .Lalloc_func$frame_escape_1 = -12
; X64: movl $42, -4(%rbp)
; X64: movl $13, -12(%rbp)
; X64: movq %rbp, %rcx
@@ -88,8 +88,8 @@ define void @alloc_func(i32 %n) {
; X86: pushl %ebp
; X86: movl %esp, %ebp
; X86: subl $12, %esp
-; X86: .set Lalloc_func$frame_escape_0, -4
-; X86: .set Lalloc_func$frame_escape_1, -12
+; X86: Lalloc_func$frame_escape_0 = -4
+; X86: Lalloc_func$frame_escape_1 = -12
; X86: movl $42, -4(%ebp)
; X86: movl $13, -12(%ebp)
; X86: pushl %ebp
@@ -118,8 +118,8 @@ define void @alloc_func_no_frameaddr() {
; X64: subq $40, %rsp
; X64: .seh_stackalloc 40
; X64: .seh_endprologue
-; X64: .set .Lalloc_func_no_frameaddr$frame_escape_0, 36
-; X64: .set .Lalloc_func_no_frameaddr$frame_escape_1, 32
+; X64: .Lalloc_func_no_frameaddr$frame_escape_0 = 36
+; X64: .Lalloc_func_no_frameaddr$frame_escape_1 = 32
; X64: movl $42, 36(%rsp)
; X64: movl $13, 32(%rsp)
; X64: xorl %ecx, %ecx
@@ -131,8 +131,8 @@ define void @alloc_func_no_frameaddr() {
; X86-LABEL: alloc_func_no_frameaddr:
; X86: subl $8, %esp
-; X86: .set Lalloc_func_no_frameaddr$frame_escape_0, 4
-; X86: .set Lalloc_func_no_frameaddr$frame_escape_1, 0
+; X86: Lalloc_func_no_frameaddr$frame_escape_0 = 4
+; X86: Lalloc_func_no_frameaddr$frame_escape_1 = 0
; X86: movl $42, 4(%esp)
; X86: movl $13, (%esp)
; X86: pushl $0
diff --git a/llvm/test/CodeGen/X86/pr22019.ll b/llvm/test/CodeGen/X86/pr22019.ll
index 4e78bae204428..262ee5fad7375 100644
--- a/llvm/test/CodeGen/X86/pr22019.ll
+++ b/llvm/test/CodeGen/X86/pr22019.ll
@@ -5,9 +5,9 @@ target triple = "x86_64-unknown-linux-gnu"
module asm "pselect = __pselect"
module asm "var = __var"
module asm "alias = __alias"
-; CHECK: .set pselect, __pselect
-; CHECK: .set var, __var
-; CHECK: .set alias, __alias
+; CHECK: pselect = __pselect
+; CHECK: var = __var
+; CHECK: alias = __alias
; CHECK: pselect:
; CHECK: retq
@@ -19,5 +19,5 @@ define void @pselect() {
; CHECK: .long 0
@var = global i32 0
-; CHECK: .set alias, var
+; CHECK: alias = var
@alias = alias i32, ptr @var
diff --git a/llvm/test/CodeGen/X86/seh-catch-all-win32.ll b/llvm/test/CodeGen/X86/seh-catch-all-win32.ll
index 3acf999fc4237..bd51ca76c59d1 100644
--- a/llvm/test/CodeGen/X86/seh-catch-all-win32.ll
+++ b/llvm/test/CodeGen/X86/seh-catch-all-win32.ll
@@ -58,7 +58,7 @@ entry:
; CHECK: pushl %edi
; CHECK: pushl %esi
-; CHECK: .set Lmain$frame_escape_0, [[code_offs:[-0-9]+]]
+; CHECK: Lmain$frame_escape_0 = [[code_offs:[-0-9]+]]
; CHECK: movl %esp, [[reg_offs:[-0-9]+]](%ebp)
; CHECK: movl $L__ehtable$main,
; EH state 0
@@ -78,7 +78,7 @@ entry:
; CHECK: calll _printf
; CHECK: .section .xdata,"dr"
-; CHECK: .set Lmain$parent_frame_offset, [[reg_offs]]
+; CHECK: Lmain$parent_frame_offset = [[reg_offs]]
; CHECK: .p2align 2
; CHECK: L__ehtable$main
; CHECK-NEXT: .long -1
diff --git a/llvm/test/CodeGen/X86/seh-catchpad.ll b/llvm/test/CodeGen/X86/seh-catchpad.ll
index 7558c4389be59..d958580e5925b 100644
--- a/llvm/test/CodeGen/X86/seh-catchpad.ll
+++ b/llvm/test/CodeGen/X86/seh-catchpad.ll
@@ -119,7 +119,7 @@ __except.ret: ; preds = %catch.dispatch.7
; CHECK: jmp .LBB1_[[epilogue]]
; CHECK: .seh_handlerdata
-; CHECK-NEXT: .set .Lmain$parent_frame_offset, 32
+; CHECK-NEXT: .Lmain$parent_frame_offset = 32
; CHECK-NEXT: .long (.Llsda_end0-.Llsda_begin0)/16
; CHECK-NEXT: .Llsda_begin0:
; CHECK-NEXT: .long .Ltmp0 at IMGREL
diff --git a/llvm/test/CodeGen/X86/seh-finally.ll b/llvm/test/CodeGen/X86/seh-finally.ll
index 28e5cf68dd27e..41823dfb38f0a 100644
--- a/llvm/test/CodeGen/X86/seh-finally.ll
+++ b/llvm/test/CodeGen/X86/seh-finally.ll
@@ -26,7 +26,7 @@ lpad: ; preds = %entry
; X64: retq
; X64: .seh_handlerdata
-; X64-NEXT: .set .Lmain$parent_frame_offset, 32
+; X64-NEXT: .Lmain$parent_frame_offset = 32
; X64-NEXT: .long (.Llsda_end0-.Llsda_begin0)/16 # Number of call sites
; X64-NEXT: .Llsda_begin0:
; X64-NEXT: .long .Ltmp0 at IMGREL # LabelStart
diff --git a/llvm/test/CodeGen/X86/seh-no-invokes.ll b/llvm/test/CodeGen/X86/seh-no-invokes.ll
index 99b81f0eb1bb4..63e91d33d4006 100644
--- a/llvm/test/CodeGen/X86/seh-no-invokes.ll
+++ b/llvm/test/CodeGen/X86/seh-no-invokes.ll
@@ -15,7 +15,7 @@
; label. This was PR30431.
; CHECK-LABEL: _f: # @f
-; CHECK: .set Lf$parent_frame_offset, 0
+; CHECK: Lf$parent_frame_offset = 0
; CHECK: retl
; CHECK-LABEL: "?filt$0 at 0@f@@": # @"\01?filt$0 at 0@f@@"
diff --git a/llvm/test/CodeGen/X86/seh-stack-realign.ll b/llvm/test/CodeGen/X86/seh-stack-realign.ll
index 2869bff822314..ae687343cc504 100644
--- a/llvm/test/CodeGen/X86/seh-stack-realign.ll
+++ b/llvm/test/CodeGen/X86/seh-stack-realign.ll
@@ -51,7 +51,7 @@ entry:
; Check that we can get the exception code from eax to the printf.
; CHECK-LABEL: _main:
-; CHECK: .set Lmain$frame_escape_0, [[code_offs:[-0-9]+]]
+; CHECK: Lmain$frame_escape_0 = [[code_offs:[-0-9]+]]
; CHECK: movl %esp, [[reg_offs:[-0-9]+]](%esi)
; CHECK: movl $L__ehtable$main,
; EH state 0
@@ -71,7 +71,7 @@ entry:
; CHECK: calll _printf
; CHECK: .section .xdata,"dr"
-; CHECK: .set Lmain$parent_frame_offset, [[reg_offs]]
+; CHECK: Lmain$parent_frame_offset = [[reg_offs]]
; CHECK: L__ehtable$main
; CHECK-NEXT: .long -1
; CHECK-NEXT: .long _filt$main
diff --git a/llvm/test/CodeGen/X86/tailcall-cgp-dup.ll b/llvm/test/CodeGen/X86/tailcall-cgp-dup.ll
index d8fcf6d86fa4d..ecbbaf3ab362d 100644
--- a/llvm/test/CodeGen/X86/tailcall-cgp-dup.ll
+++ b/llvm/test/CodeGen/X86/tailcall-cgp-dup.ll
@@ -34,12 +34,12 @@ define i32 @foo(i32 %x) nounwind ssp {
; CHECK-NEXT: retq
; CHECK-NEXT: .p2align 2
; CHECK-NEXT: .data_region jt32
-; CHECK-NEXT: .set L0_0_set_2, LBB0_2-LJTI0_0
-; CHECK-NEXT: .set L0_0_set_3, LBB0_3-LJTI0_0
-; CHECK-NEXT: .set L0_0_set_4, LBB0_4-LJTI0_0
-; CHECK-NEXT: .set L0_0_set_5, LBB0_5-LJTI0_0
-; CHECK-NEXT: .set L0_0_set_6, LBB0_6-LJTI0_0
-; CHECK-NEXT: .set L0_0_set_7, LBB0_7-LJTI0_0
+; CHECK-NEXT: L0_0_set_2 = LBB0_2-LJTI0_0
+; CHECK-NEXT: L0_0_set_3 = LBB0_3-LJTI0_0
+; CHECK-NEXT: L0_0_set_4 = LBB0_4-LJTI0_0
+; CHECK-NEXT: L0_0_set_5 = LBB0_5-LJTI0_0
+; CHECK-NEXT: L0_0_set_6 = LBB0_6-LJTI0_0
+; CHECK-NEXT: L0_0_set_7 = LBB0_7-LJTI0_0
; CHECK-NEXT: LJTI0_0:
; CHECK-NEXT: .long L0_0_set_2
; CHECK-NEXT: .long L0_0_set_3
diff --git a/llvm/test/CodeGen/X86/windows-seh-EHa-TryInFinally.ll b/llvm/test/CodeGen/X86/windows-seh-EHa-TryInFinally.ll
index 16322cbe9980e..9e44299083d46 100644
--- a/llvm/test/CodeGen/X86/windows-seh-EHa-TryInFinally.ll
+++ b/llvm/test/CodeGen/X86/windows-seh-EHa-TryInFinally.ll
@@ -2,7 +2,7 @@
; CHECK-LABEL: "?fin$0 at 0@main@@"
; CHECK: .seh_handlerdata
-; CHECK: .set ".L?fin$0 at 0@main@@$parent_frame_offset", 48
+; CHECK: ".L?fin$0 at 0@main@@$parent_frame_offset" = 48
; CHECK-NEXT: .long (.Llsda_end1-.Llsda_begin1)/16
; CHECK-NEXT: .Llsda_begin1:
; CHECK-NEXT: .long .Ltmp
diff --git a/llvm/test/CodeGen/XCore/globals.ll b/llvm/test/CodeGen/XCore/globals.ll
index 134bbb3444b5d..186cfda97104d 100644
--- a/llvm/test/CodeGen/XCore/globals.ll
+++ b/llvm/test/CodeGen/XCore/globals.ll
@@ -127,4 +127,4 @@ entry:
@array = global [10 x i16] zeroinitializer, align 2
; CHECK: .globl array.globound
-; CHECK: .set array.globound, 10
+; CHECK: array.globound = 10
diff --git a/llvm/test/CodeGen/XCore/linkage.ll b/llvm/test/CodeGen/XCore/linkage.ll
index 93edf01cf8a96..5bfb83d964dfa 100644
--- a/llvm/test/CodeGen/XCore/linkage.ll
+++ b/llvm/test/CodeGen/XCore/linkage.ll
@@ -19,14 +19,14 @@ define protected void @test_protected() {
}
; CHECK: .globl array.globound
-; CHECK: .set array.globound, 2
+; CHECK: array.globound = 2
; CHECK: .weak array.globound
; CHECK: .globl array
; CHECK: .weak array
@array = weak global [2 x i32] zeroinitializer
; CHECK: .globl ac.globound
-; CHECK: .set ac.globound, 2
+; CHECK: ac.globound = 2
; CHECK: .weak ac.globound
; CHECK: .globl ac
; CHECK: .weak ac
diff --git a/llvm/test/MC/AArch64/basic-a64-instructions.s b/llvm/test/MC/AArch64/basic-a64-instructions.s
index 14ac11f581a55..b2ec5b6ac3678 100644
--- a/llvm/test/MC/AArch64/basic-a64-instructions.s
+++ b/llvm/test/MC/AArch64/basic-a64-instructions.s
@@ -3349,7 +3349,7 @@ _func:
.equ equvalue, 0x0001
movk x1, equvalue, lsl 16
-// CHECK: .set equvalue, 1
+// CHECK: equvalue = 1
// CHECK-NEXT: movk x1, #1, lsl #16 // encoding: [0x21,0x00,0xa0,0xf2]
movz x2, #:abs_g0:sym
diff --git a/llvm/test/MC/AsmParser/assignment.s b/llvm/test/MC/AsmParser/assignment.s
index 6f84a1c338dad..8c8984c12ac36 100644
--- a/llvm/test/MC/AsmParser/assignment.s
+++ b/llvm/test/MC/AsmParser/assignment.s
@@ -1,22 +1,22 @@
# RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s
# CHECK: TEST0:
-# CHECK: .set a, 0
+# CHECK: a = 0
TEST0:
a = 0
# CHECK: TEST1:
-# CHECK: .set b, 0
+# CHECK: b = 0
TEST1:
- .set b, 0
+ b = 0
# CHECK: .globl _f1
-# CHECK: .set _f1, 0
+# CHECK: _f1 = 0
.globl _f1
_f1 = 0
# CHECK: .globl _f2
-# CHECK: .set _f2, 0
+# CHECK: _f2 = 0
.globl _f2
- .set _f2, 0
+ _f2 = 0
diff --git a/llvm/test/MC/AsmParser/directive_include.s b/llvm/test/MC/AsmParser/directive_include.s
index 8d2ef2753b23a..f53bc671fc646 100644
--- a/llvm/test/MC/AsmParser/directive_include.s
+++ b/llvm/test/MC/AsmParser/directive_include.s
@@ -2,7 +2,7 @@
# CHECK: TESTA:
# CHECK: TEST0:
-# CHECK: .set a, 0
+# CHECK: a = 0
# CHECK: TESTB:
TESTA:
.include "directive\137set.s" # "\137" is underscore "_"
diff --git a/llvm/test/MC/AsmParser/directive_set.s b/llvm/test/MC/AsmParser/directive_set.s
index 65dd33d1d54fb..4b93de01b309d 100644
--- a/llvm/test/MC/AsmParser/directive_set.s
+++ b/llvm/test/MC/AsmParser/directive_set.s
@@ -1,13 +1,13 @@
# RUN: llvm-mc -triple i386-unknown-elf %s | FileCheck %s
# CHECK: TEST0:
-# CHECK: .set a, 0
+# CHECK: a = 0
# CHECK-NOT: .no_dead_strip a
TEST0:
- .set a, 0
+ a = 0
# CHECK: TEST1:
-# CHECK: .set a, 0
+# CHECK: a = 0
# CHECK-NOT: .no_dead_strip a
TEST1:
.equ a, 0
diff --git a/llvm/test/MC/AsmParser/include.ll b/llvm/test/MC/AsmParser/include.ll
index 3321f0a6a2872..22c9eaf7a36e9 100644
--- a/llvm/test/MC/AsmParser/include.ll
+++ b/llvm/test/MC/AsmParser/include.ll
@@ -10,5 +10,5 @@ entry:
ret void
}
-; CHECK: .set MODULE, 1
-; CHECK: .set FUNCTION, 1
+; CHECK: MODULE = 1
+; CHECK: FUNCTION = 1
diff --git a/llvm/test/MC/AsmParser/labels.s b/llvm/test/MC/AsmParser/labels.s
index 599ce72c44eef..6a9870b655f2f 100644
--- a/llvm/test/MC/AsmParser/labels.s
+++ b/llvm/test/MC/AsmParser/labels.s
@@ -18,12 +18,12 @@ foo:
// CHECK: addl $24, a$b+10(%eax)
addl $24, ("a$b" + 10)(%eax)
-// CHECK: .set b$c, 10
+// CHECK: b$c = 10
"b$c" = 10
// CHECK: addl $10, %eax
addl $"b$c", %eax
-// CHECK: .set "a 0", 11
+// CHECK: "a 0" = 11
.set "a 0", 11
// CHECK: .long 11
@@ -49,7 +49,7 @@ foo:
// CHECX: .lsym "a 8",1
// .lsym "a 8", 1
-// CHECK: .set "a 9", a-b
+// CHECK: "a 9" = a-b
.set "a 9", a - b
// CHECK: .long "a 9"
diff --git a/llvm/test/MC/AsmParser/macro-arg-darwin.s b/llvm/test/MC/AsmParser/macro-arg-darwin.s
index 8671107539ce7..88c63dd488be4 100644
--- a/llvm/test/MC/AsmParser/macro-arg-darwin.s
+++ b/llvm/test/MC/AsmParser/macro-arg-darwin.s
@@ -38,7 +38,7 @@ bar
.endif
.endm
.macro bottom
- .set fred, $0
+ fred = $0
.endm
.text
@@ -49,7 +49,7 @@ top bar, 42
// CHECK: _foo:
// CHECK-NOT: fred
// CHECK: _bar
-// CHECK-NEXT: .set fred, 42
+// CHECK-NEXT: fred = 42
.macro foo
diff --git a/llvm/test/MC/AsmParser/motorola_integers.s b/llvm/test/MC/AsmParser/motorola_integers.s
index c75d9a5e0cb14..1ec2e02e97f02 100644
--- a/llvm/test/MC/AsmParser/motorola_integers.s
+++ b/llvm/test/MC/AsmParser/motorola_integers.s
@@ -1,10 +1,10 @@
# RUN: llvm-mc -triple i386-unknown-unknown -motorola-integers %s | FileCheck %s
-# CHECK: .set a, 2882400009
-.set a, $aBcDeF09
-# CHECK: .set b, 256
-.set b, $0100
-# CHECK: .set c, 10
-.set c, %01010
-# CHECK: .set d, 1
-.set d, %1
+# CHECK: a = 2882400009
+a = $aBcDeF09
+# CHECK: b = 256
+b = $0100
+# CHECK: c = 10
+c = %01010
+# CHECK: d = 1
+d = %1
diff --git a/llvm/test/MC/Mips/cpsetup.s b/llvm/test/MC/Mips/cpsetup.s
index 4a027c6e796ae..f948d650da94d 100644
--- a/llvm/test/MC/Mips/cpsetup.s
+++ b/llvm/test/MC/Mips/cpsetup.s
@@ -196,7 +196,7 @@ IMM_8 = 8
# ALL-LABEL: <t1b>:
# ASM-LABEL: t1b:
-# ASM-NEXT: .set IMM_8, 8
+# ASM-NEXT: IMM_8 = 8
# O32-NOT: __cerror
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