[llvm] [RISCV] Add RISCVISD::VQDOT*_VL to RISCVSelectionDAGInfo::verifyTargetNode. (PR #142202)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Fri May 30 12:56:07 PDT 2025
https://github.com/topperc updated https://github.com/llvm/llvm-project/pull/142202
>From b28b3d0785dae2b08e96d9ab08a5a72c23d5d52d Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Fri, 30 May 2025 12:02:59 -0700
Subject: [PATCH 1/2] [RISCV] Add RISCVISD::VQDOT*_VL to
RISCVSelectionDAGInfo::verifyTargetNode.
After seeing the bug that #142185 fixed, I thought it might be a
good idea to start verifying that nodes are formed correctly.
This patch introduces the verifyTargetNode function and adds these
opcodes. More opcodes can be added in later patches.
---
.../Target/RISCV/RISCVSelectionDAGInfo.cpp | 32 +++++++++++++++++++
llvm/lib/Target/RISCV/RISCVSelectionDAGInfo.h | 3 ++
2 files changed, 35 insertions(+)
diff --git a/llvm/lib/Target/RISCV/RISCVSelectionDAGInfo.cpp b/llvm/lib/Target/RISCV/RISCVSelectionDAGInfo.cpp
index 4ebf13f5bc538..d0e7e4d7ed79a 100644
--- a/llvm/lib/Target/RISCV/RISCVSelectionDAGInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVSelectionDAGInfo.cpp
@@ -17,3 +17,35 @@ RISCVSelectionDAGInfo::RISCVSelectionDAGInfo()
: SelectionDAGGenTargetInfo(RISCVGenSDNodeInfo) {}
RISCVSelectionDAGInfo::~RISCVSelectionDAGInfo() = default;
+
+void RISCVSelectionDAGInfo::verifyTargetNode(const SelectionDAG &DAG,
+ const SDNode *N) const {
+#ifndef NDEBUG
+ switch (N->getOpcode()) {
+ default:
+ return SelectionDAGGenTargetInfo::verifyTargetNode(DAG, N);
+ case RISCVISD::VQDOT_VL:
+ case RISCVISD::VQDOTU_VL:
+ case RISCVISD::VQDOTSU_VL: {
+ assert(N->getNumValues() == 1 && "Expected one result!");
+ assert(N->getNumOperands() == 5 && "Expected five operands!");
+ EVT VT = N->getValueType(0);
+ assert(VT.isScalableVector() && VT.getVectorElementType() == MVT::i32 &&
+ "Expected result to be an i32 scalable vector");
+ assert(N->getOperand(0).getValueType() == VT &&
+ N->getOperand(1).getValueType() == VT &&
+ N->getOperand(2).getValueType() == VT &&
+ "Expected result and first 3 operands to have the same type!");
+ EVT MaskVT = N->getOperand(3).getValueType();
+ assert(MaskVT.isScalableVector() && MaskVT.getVectorElementType() == MVT::i1 &&
+ MaskVT.getVectorElementCount() == VT.getVectorElementCount() &&
+ "Expected mask VT to be an i1 scalable vector with same number of "
+ "elements as the result");
+ assert((N->getOperand(4).getValueType() == MVT::i32 ||
+ N->getOperand(4).getValueType() == MVT::i64) &&
+ "Expect VL operand to be i32 or i64");
+ break;
+ }
+ }
+#endif
+}
diff --git a/llvm/lib/Target/RISCV/RISCVSelectionDAGInfo.h b/llvm/lib/Target/RISCV/RISCVSelectionDAGInfo.h
index 4757571fb3de4..641189f8661c1 100644
--- a/llvm/lib/Target/RISCV/RISCVSelectionDAGInfo.h
+++ b/llvm/lib/Target/RISCV/RISCVSelectionDAGInfo.h
@@ -31,6 +31,9 @@ class RISCVSelectionDAGInfo : public SelectionDAGGenTargetInfo {
~RISCVSelectionDAGInfo() override;
+ void verifyTargetNode(const SelectionDAG &DAG,
+ const SDNode *N) const override;
+
bool hasPassthruOp(unsigned Opcode) const {
return GenNodeInfo.getDesc(Opcode).TSFlags & RISCVISD::HasPassthruOpMask;
}
>From ac90d3e48c57a42299593e8d018a3fb5ee3d4e44 Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Fri, 30 May 2025 12:55:54 -0700
Subject: [PATCH 2/2] fixup! clang-format
---
llvm/lib/Target/RISCV/RISCVSelectionDAGInfo.cpp | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/llvm/lib/Target/RISCV/RISCVSelectionDAGInfo.cpp b/llvm/lib/Target/RISCV/RISCVSelectionDAGInfo.cpp
index d0e7e4d7ed79a..668e59686664e 100644
--- a/llvm/lib/Target/RISCV/RISCVSelectionDAGInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVSelectionDAGInfo.cpp
@@ -37,7 +37,8 @@ void RISCVSelectionDAGInfo::verifyTargetNode(const SelectionDAG &DAG,
N->getOperand(2).getValueType() == VT &&
"Expected result and first 3 operands to have the same type!");
EVT MaskVT = N->getOperand(3).getValueType();
- assert(MaskVT.isScalableVector() && MaskVT.getVectorElementType() == MVT::i1 &&
+ assert(MaskVT.isScalableVector() &&
+ MaskVT.getVectorElementType() == MVT::i1 &&
MaskVT.getVectorElementCount() == VT.getVectorElementCount() &&
"Expected mask VT to be an i1 scalable vector with same number of "
"elements as the result");
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