[llvm] [AArch64] Signed comparison using CMN is safe when the subtraction is nsw (PR #141993)
via llvm-commits
llvm-commits at lists.llvm.org
Thu May 29 14:48:15 PDT 2025
https://github.com/AZero13 updated https://github.com/llvm/llvm-project/pull/141993
>From 1f2be844bcb93ec9a00cd5d71840716316e03ba1 Mon Sep 17 00:00:00 2001
From: Rose <gfunni234 at gmail.com>
Date: Thu, 29 May 2025 12:52:29 -0400
Subject: [PATCH 1/2] [AArch64] Pre-commit tests (NFC)
---
llvm/test/CodeGen/AArch64/cmp-to-cmn.ll | 48 +++++++++++++++++++++++++
1 file changed, 48 insertions(+)
diff --git a/llvm/test/CodeGen/AArch64/cmp-to-cmn.ll b/llvm/test/CodeGen/AArch64/cmp-to-cmn.ll
index e87d43161a895..c44f2c13d42b2 100644
--- a/llvm/test/CodeGen/AArch64/cmp-to-cmn.ll
+++ b/llvm/test/CodeGen/AArch64/cmp-to-cmn.ll
@@ -430,3 +430,51 @@ entry:
%cmp = icmp ne i32 %conv, %add
ret i1 %cmp
}
+
+define i1 @cmn_nsw(i32 %a, i32 %b) {
+; CHECK-LABEL: cmn_nsw:
+; CHECK: // %bb.0:
+; CHECK-NEXT: neg w8, w1
+; CHECK-NEXT: cmp w0, w8
+; CHECK-NEXT: cset w0, gt
+; CHECK-NEXT: ret
+%sub = sub nsw i32 0, %b
+%cmp = icmp sgt i32 %a, %sub
+ret i1 %cmp
+}
+
+define i1 @cmn_nsw_64(i64 %a, i64 %b) {
+; CHECK-LABEL: cmn_nsw_64:
+; CHECK: // %bb.0:
+; CHECK-NEXT: neg x8, x1
+; CHECK-NEXT: cmp x0, x8
+; CHECK-NEXT: cset w0, gt
+; CHECK-NEXT: ret
+%sub = sub nsw i64 0, %b
+%cmp = icmp sgt i64 %a, %sub
+ret i1 %cmp
+}
+
+define i1 @cmn_nsw_neg(i32 %a, i32 %b) {
+; CHECK-LABEL: cmn_nsw_neg:
+; CHECK: // %bb.0:
+; CHECK-NEXT: neg w8, w1
+; CHECK-NEXT: cmp w0, w8
+; CHECK-NEXT: cset w0, gt
+; CHECK-NEXT: ret
+%sub = sub i32 0, %b
+%cmp = icmp sgt i32 %a, %sub
+ret i1 %cmp
+}
+
+define i1 @cmn_nsw_neg_64(i64 %a, i64 %b) {
+; CHECK-LABEL: cmn_nsw_neg_64:
+; CHECK: // %bb.0:
+; CHECK-NEXT: neg x8, x1
+; CHECK-NEXT: cmp x0, x8
+; CHECK-NEXT: cset w0, gt
+; CHECK-NEXT: ret
+%sub = sub i64 0, %b
+%cmp = icmp sgt i64 %a, %sub
+ret i1 %cmp
+}
>From 8d7e3528aae2993eb6d99737123014a0a571db98 Mon Sep 17 00:00:00 2001
From: Rose <gfunni234 at gmail.com>
Date: Thu, 29 May 2025 13:27:19 -0400
Subject: [PATCH 2/2] [AArch64] Signed comparison using CMN is safe when the
subtraction is nsw
nsw means no signed wrap, and 0 - INT_MIN is a signed wrap.
Now, this is going to be a point I need to get out of the way:
So is it okay to always transform a > -b into cmn if it is a signed comparison, even if b is INT_MIN because -INT_MIN is undefined, at least in C.
Taking advantage of UB doesn't introduce bugs. But, this could change behavior in programs with UB.
---
.../Target/AArch64/AArch64ISelLowering.cpp | 19 +++++++++++++++----
llvm/test/CodeGen/AArch64/cmp-to-cmn.ll | 6 ++----
2 files changed, 17 insertions(+), 8 deletions(-)
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index f18d325148742..8b409eb1cbccf 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -3342,8 +3342,19 @@ static bool isLegalArithImmed(uint64_t C) {
return IsLegal;
}
-static bool cannotBeIntMin(SDValue CheckedVal, SelectionDAG &DAG) {
- KnownBits KnownSrc = DAG.computeKnownBits(CheckedVal);
+static bool isSafeSignedCMN(SDValue Op, SelectionDAG &DAG) {
+ // 0 - INT_MIN sign wraps, so no signed wrap means cmn is safe.
+ if (Op->getFlags().hasNoSignedWrap())
+ return true;
+
+ // Created nodes may have no flags. SelectionDAG inherits flags from the IR,
+ // but if the DAG makes the node, as of now it doesn't set any flags.
+
+ // FIXME: We can remove this check and simply rely on
+ // Op->getFlags().hasNoSignedWrap() if SelectionDAG/ISelLowering never creates
+ // subtract nodes, or SelectionDAG/ISelLowering consistently sets them
+ // appropiately when making said nodes.
+ KnownBits KnownSrc = DAG.computeKnownBits(Op.getOperand(1));
return !KnownSrc.getSignedMinValue().isMinSignedValue();
}
@@ -3352,7 +3363,7 @@ static bool cannotBeIntMin(SDValue CheckedVal, SelectionDAG &DAG) {
// can be set differently by this operation. It comes down to whether
// "SInt(~op2)+1 == SInt(~op2+1)" (and the same for UInt). If they are then
// everything is fine. If not then the optimization is wrong. Thus general
-// comparisons are only valid if op2 != 0.
+// comparisons are only valid if op2 != 0 and op2 != INT_MIN.
//
// So, finally, the only LLVM-native comparisons that don't mention C or V
// are the ones that aren't unsigned comparisons. They're the only ones we can
@@ -3361,7 +3372,7 @@ static bool isCMN(SDValue Op, ISD::CondCode CC, SelectionDAG &DAG) {
return Op.getOpcode() == ISD::SUB && isNullConstant(Op.getOperand(0)) &&
(isIntEqualitySetCC(CC) ||
(isUnsignedIntSetCC(CC) && DAG.isKnownNeverZero(Op.getOperand(1))) ||
- (isSignedIntSetCC(CC) && cannotBeIntMin(Op.getOperand(1), DAG)));
+ (isSignedIntSetCC(CC) && isSafeSignedCMN(Op, DAG)));
}
static SDValue emitStrictFPComparison(SDValue LHS, SDValue RHS, const SDLoc &dl,
diff --git a/llvm/test/CodeGen/AArch64/cmp-to-cmn.ll b/llvm/test/CodeGen/AArch64/cmp-to-cmn.ll
index c44f2c13d42b2..7a3bbc3307461 100644
--- a/llvm/test/CodeGen/AArch64/cmp-to-cmn.ll
+++ b/llvm/test/CodeGen/AArch64/cmp-to-cmn.ll
@@ -434,8 +434,7 @@ entry:
define i1 @cmn_nsw(i32 %a, i32 %b) {
; CHECK-LABEL: cmn_nsw:
; CHECK: // %bb.0:
-; CHECK-NEXT: neg w8, w1
-; CHECK-NEXT: cmp w0, w8
+; CHECK-NEXT: cmn w0, w1
; CHECK-NEXT: cset w0, gt
; CHECK-NEXT: ret
%sub = sub nsw i32 0, %b
@@ -446,8 +445,7 @@ ret i1 %cmp
define i1 @cmn_nsw_64(i64 %a, i64 %b) {
; CHECK-LABEL: cmn_nsw_64:
; CHECK: // %bb.0:
-; CHECK-NEXT: neg x8, x1
-; CHECK-NEXT: cmp x0, x8
+; CHECK-NEXT: cmn x0, x1
; CHECK-NEXT: cset w0, gt
; CHECK-NEXT: ret
%sub = sub nsw i64 0, %b
More information about the llvm-commits
mailing list