[llvm] [WIP][AMDGPU] Improve the handling of `inreg` arguments (PR #133614)

[Shilei Tian via llvm-commits]

shiltian wrote:

At this point, if we want to move forward, we need an approach to express those registers in code, like `VGPR1_12` stands for `v1` of lane 12. It is pretty similar to those permutation of continuous registers. After that, we can simply implement the calling conventions in the td file. No need for custom calling convention implementation.

https://github.com/llvm/llvm-project/pull/133614