[llvm] RISCV: Replace most Specifier constants with relocation types (PR #138644)

[Fangrui Song via llvm-commits]

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@@ -626,7 +626,7 @@ void RISCVAsmPrinter::LowerHWASAN_CHECK_MEMACCESS(const MachineInstr &MI) {
     Sym = OutContext.getOrCreateSymbol(SymName);
   }
   auto Res = MCSymbolRefExpr::create(Sym, OutContext);
-  auto Expr = RISCVMCExpr::create(Res, RISCVMCExpr::VK_CALL, OutContext);
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MaskRay wrote:

hwasan doesn't support Mach-O. 

IIUI llvm/lib/Target/AArch64/AArch64MCInstLower.cpp llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp there will be very little for share between ELF and Mach-O anyway.

https://github.com/llvm/llvm-project/pull/138644