[llvm] [X86] Distribute Certain Bitwise Operations over SELECT (PR #136555)
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Thu May 29 07:53:17 PDT 2025
================
@@ -35552,8 +35553,24 @@ bool X86TargetLowering::isNarrowingProfitable(SDNode *N, EVT SrcVT,
bool X86TargetLowering::shouldFoldSelectWithIdentityConstant(
unsigned BinOpcode, EVT VT, unsigned SelectOpcode, SDValue X,
SDValue Y) const {
- if (SelectOpcode != ISD::VSELECT)
+ if (SelectOpcode == ISD::SELECT) {
+ if (VT.isVector())
+ return false;
+ if (!Subtarget.hasBMI() || (VT != MVT::i32 && VT != MVT::i64))
+ return false;
+ using namespace llvm::SDPatternMatch;
+ // BLSI
+ if (BinOpcode == ISD::AND && sd_match(Y, m_Neg(m_Specific(X))))
----------------
RKSimon wrote:
can't `sd_match(X, m_Neg(m_Specific(Y)))` occur as well?
https://github.com/llvm/llvm-project/pull/136555
More information about the llvm-commits
mailing list