[llvm] [VPlan] Simplify branch on False in VPlan transform (NFC). (PR #140409)

[via llvm-commits]

================
@@ -541,37 +545,31 @@ void VPlanTransforms::prepareForVectorization(
   //    Thus if tail is to be folded, we know we don't need to run the
   //    remainder and we can set the condition to true.
   // 3) Otherwise, construct a runtime check.
+  VPBlockUtils::connectBlocks(MiddleVPBB, ScalarPH);
+  // Also connect the entry block to the scalar preheader.
+  VPBlockUtils::connectBlocks(Plan.getEntry(), ScalarPH);
+  Plan.getEntry()->swapSuccessors();
 
-  if (!RequiresScalarEpilogueCheck) {
-    if (auto *LatchExitVPB = MiddleVPBB->getSingleSuccessor())
-      VPBlockUtils::disconnectBlocks(MiddleVPBB, LatchExitVPB);
-    VPBlockUtils::connectBlocks(MiddleVPBB, ScalarPH);
-    // The exit blocks are unreachable, remove their recipes to make sure no
-    // users remain that may pessimize transforms.
-    for (auto *EB : Plan.getExitBlocks()) {
-      for (VPRecipeBase &R : make_early_inc_range(*EB))
-        R.eraseFromParent();
-    }
+  if (MiddleVPBB->getNumSuccessors() != 2)
----------------
ayalz wrote:

(Documentation deserves updating.)
This "middle-w/o-2-successors" case corresponds to middle block not branching to exit because latch isn't exiting, so middle block only branches unconditionally to the required scalar epilog, as in case 1 above, except no connection existed which needs to be removed, whose destination becomes unreachable and recipes need to be removed. Better document above as "subcase 1.A." (or case 0)? The complementary "subcase 1.B." (or case 1) has an exiting latch (which middle is initially connected to above) but requires a scalar epilog for other reasons (e.g., an interleave group missing its last element), so we need to drop this connection and "Remove the recipes from the exit blocks" - but now do so lazily by introducing a branch-on-false to be folded later, as done for case 2 with branch-on-true.

https://github.com/llvm/llvm-project/pull/140409