[llvm] [AArch64] treat `@llvm.ssub.sat` the same as `@llvm.aarch64.neon.sqsub` (PR #140454)

[via llvm-commits]

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@@ -9861,14 +9843,15 @@ multiclass SIMDIndexedLongSD<bit U, bits<4> opc, string asm,
 }
 
 multiclass SIMDIndexedLongSQDMLXSDTied<bit U, bits<4> opc, string asm,
-                                       SDPatternOperator Accum> {
+                                       SDPatternOperator VecAcc,
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SpencerAbson wrote:

OK - this is fine IMO.  I'll add something myself later on, as it looks like there might be more discussion to be had surrounding these intrinsics.

https://github.com/llvm/llvm-project/pull/140454