[llvm] ab0931b - MC: Set MCSection::LinkerRelaxable for linker-relaxable MCAlignFragment
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Wed May 28 22:46:42 PDT 2025
Author: Fangrui Song
Date: 2025-05-28T22:46:37-07:00
New Revision: ab0931b6389838cb5d7d11914063a1ddd84102f0
URL: https://github.com/llvm/llvm-project/commit/ab0931b6389838cb5d7d11914063a1ddd84102f0
DIFF: https://github.com/llvm/llvm-project/commit/ab0931b6389838cb5d7d11914063a1ddd84102f0.diff
LOG: MC: Set MCSection::LinkerRelaxable for linker-relaxable MCAlignFragment
Commit bb03cdcb441fd68da9d1ebb7d5f39f73667cd39c caused a Linux kernel
regression https://github.com/ClangBuiltLinux/linux/issues/2091
When a section contains linker-relaxable MCAlignmentFragment but no
linker-relaxable instructions, the RISCVAsmBackend::isPCRelFixupResolved
code path should be taken as well. The #76552 condition in the fragment
walk code will make the fixup unresolvable, leading to a relocation.
Added:
Modified:
llvm/lib/MC/MCObjectStreamer.cpp
llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
llvm/test/MC/RISCV/align.s
llvm/test/MC/RISCV/cfi-advance.s
Removed:
################################################################################
diff --git a/llvm/lib/MC/MCObjectStreamer.cpp b/llvm/lib/MC/MCObjectStreamer.cpp
index cbf3a84cc1f02..e3d5a5a9a1327 100644
--- a/llvm/lib/MC/MCObjectStreamer.cpp
+++ b/llvm/lib/MC/MCObjectStreamer.cpp
@@ -586,7 +586,14 @@ void MCObjectStreamer::emitCodeAlignment(Align Alignment,
const MCSubtargetInfo *STI,
unsigned MaxBytesToEmit) {
emitValueToAlignment(Alignment, 0, 1, MaxBytesToEmit);
- cast<MCAlignFragment>(getCurrentFragment())->setEmitNops(true, STI);
+ auto *F = cast<MCAlignFragment>(getCurrentFragment());
+ F->setEmitNops(true, STI);
+ // With RISC-V style linker relaxation, mark the section as linker-relaxable
+ // if the alignment is larger than the minimum NOP size.
+ unsigned Size;
+ if (getAssembler().getBackend().shouldInsertExtraNopBytesForCodeAlign(*F,
+ Size))
+ getCurrentSectionOnly()->setLinkerRelaxable();
}
void MCObjectStreamer::emitValueToOffset(const MCExpr *Offset,
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
index f7f39439249e8..963501db118e7 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
@@ -546,7 +546,7 @@ static uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value,
bool RISCVAsmBackend::isPCRelFixupResolved(const MCSymbol *SymA,
const MCFragment &F) {
- // If the section does not contain linker-relaxable instructions, PC-relative
+ // If the section does not contain linker-relaxable fragments, PC-relative
// fixups can be resolved.
if (!F.getParent()->isLinkerRelaxable())
return true;
diff --git a/llvm/test/MC/RISCV/align.s b/llvm/test/MC/RISCV/align.s
index 32cc071b613cb..1dab1c6f75458 100644
--- a/llvm/test/MC/RISCV/align.s
+++ b/llvm/test/MC/RISCV/align.s
@@ -134,3 +134,23 @@ data2:
.option norvc
.balign 4
add a0, a0, a1
+
+## Branches crossing the linker-relaxable R_RISCV_ALIGN need relocations.
+# RELAX-RELOC: .rela.text3 {
+# RELAX-RELOC-NEXT: 0x4 R_RISCV_BRANCH .Ltmp[[#]] 0x0
+# RELAX-RELOC-NEXT: 0x8 R_RISCV_ALIGN - 0x4
+# RELAX-RELOC-NEXT: 0xC R_RISCV_BRANCH .Ltmp[[#]] 0x0
+# RELAX-RELOC-NEXT: }
+# C-OR-ZCA-EXT-RELAX-RELOC: .rela.text3 {
+# C-OR-ZCA-EXT-RELAX-RELOC-NEXT: 0x4 R_RISCV_BRANCH .Ltmp[[#]] 0x0
+# C-OR-ZCA-EXT-RELAX-RELOC-NEXT: 0x8 R_RISCV_ALIGN - 0x4
+# C-OR-ZCA-EXT-RELAX-RELOC-NEXT: 0xC R_RISCV_BRANCH .Ltmp[[#]] 0x0
+# C-OR-ZCA-EXT-RELAX-RELOC-NEXT: }
+ .section .text3, "ax"
+ bnez t1, 1f
+ bnez t2, 2f
+1:
+ .p2align 3
+2:
+ bnez t1, 1b
+ bnez t1, 2b
diff --git a/llvm/test/MC/RISCV/cfi-advance.s b/llvm/test/MC/RISCV/cfi-advance.s
index 1f49abbccf5e2..f3f8530c419f0 100644
--- a/llvm/test/MC/RISCV/cfi-advance.s
+++ b/llvm/test/MC/RISCV/cfi-advance.s
@@ -13,16 +13,26 @@
# RELAX: R_RISCV_CALL_PLT
# RELAX-NEXT: R_RISCV_RELAX
# RELAX-EMPTY:
-# CHECK-NEXT: Relocation section '.rela.eh_frame' at offset {{.*}} contains 1 entries:
-# CHECK: Offset Info Type Sym. Value Symbol's Name + Addend
-# CHECK-NEXT: 0000001c 00000139 R_RISCV_32_PCREL 00000000 .L0 + 0
+# NORELAX-NEXT: Relocation section '.rela.eh_frame' at offset {{.*}} contains 1 entries:
+# NORELAX: Offset Info Type Sym. Value Symbol's Name + Addend
+# NORELAX-NEXT: 0000001c 00000139 R_RISCV_32_PCREL 00000000 .L0 + 0
+# RELAX-NEXT: Relocation section '.rela.eh_frame' at offset {{.*}} contains 5 entries:
+# RELAX: Offset Info Type Sym. Value Symbol's Name + Addend
+# RELAX-NEXT: 0000001c 00000139 R_RISCV_32_PCREL 00000000 .L0 + 0
+# RELAX-NEXT: 00000020 00000c23 R_RISCV_ADD32 0001017a .L0 + 0
+# RELAX-NEXT: 00000020 00000127 R_RISCV_SUB32 00000000 .L0 + 0
+# RELAX-NEXT: 00000035 00000b35 R_RISCV_SET6 00010176 .L0 + 0
+# RELAX-NEXT: 00000035 00000934 R_RISCV_SUB6 0001016e .L0 + 0
# CHECK-EMPTY:
-# CHECK: Symbol table '.symtab' contains 13 entries:
-# CHECK-NEXT: Num: Value Size Type Bind Vis Ndx Name
-# CHECK-NEXT: 0: 00000000 0 NOTYPE LOCAL DEFAULT UND
-# CHECK-NEXT: 1: 00000000 0 NOTYPE LOCAL DEFAULT 2 .L0 {{$}}
-# CHECK: 3: 00000004 0 NOTYPE LOCAL DEFAULT 2 .L0{{$}}
-# CHECK-NOT: .L0
+# NORELAX: Symbol table '.symtab' contains 13 entries:
+# RELAX: Symbol table '.symtab' contains 16 entries:
+# RELAX-NEXT: Num: Value Size Type Bind Vis Ndx Name
+# RELAX-NEXT: 0: 00000000 0 NOTYPE LOCAL DEFAULT UND
+# RELAX-NEXT: 1: 00000000 0 NOTYPE LOCAL DEFAULT 2 .L0 {{$}}
+# RELAX: 3: 00000004 0 NOTYPE LOCAL DEFAULT 2 .L0{{$}}
+# RELAX: 9: 0001016e 0 NOTYPE LOCAL DEFAULT 2 .L0 {{$}}
+# RELAX: 11: 00010176 0 NOTYPE LOCAL DEFAULT 2 .L0 {{$}}
+# RELAX: 12: 0001017a 0 NOTYPE LOCAL DEFAULT 2 .L0 {{$}}
# CHECK-DWARFDUMP: DW_CFA_advance_loc1: 104
# CHECK-DWARFDUMP-NEXT: DW_CFA_def_cfa_offset: +8
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