[llvm] MachineCombiner: Partially fix losing subregister indexes (PR #141661)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Wed May 28 12:58:18 PDT 2025


================
@@ -1414,7 +1418,7 @@ void TargetInstrInfo::reassociateOps(
     if (Idx == 0)
       continue;
     if (Idx == RootFirstOpIdx)
-      MIB2 = MIB2.addReg(RegA, getKillRegState(KillA));
+      MIB2 = MIB2.addReg(RegA, getKillRegState(KillA), SubRegA);
----------------
arsenm wrote:

It's used as a result register, and this is still SSA so it cannot have a subregister 

https://github.com/llvm/llvm-project/pull/141661


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