[llvm] [SwitchLowering] Support merging 0 and power-of-2 case. (PR #139736)

[Florian Hahn via llvm-commits]

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@@ -362,6 +362,41 @@ void SwitchCG::SwitchLowering::findBitTestClusters(CaseClusterVector &Clusters,
     }
   }
   Clusters.resize(DstIndex);
+
+  // Check if the clusters contain one checking for 0 and another one checking
+  // for a power-of-2 constant with matching destinations. Those clusters can be
+  // combined to a single ane with CC_And.
+  unsigned ZeroIdx = -1;
+  for (const auto &[Idx, C] : enumerate(Clusters)) {
+    if (C.Kind != CC_Range || C.Low != C.High)
+      continue;
+    if (C.Low->isZero()) {
+      ZeroIdx = Idx;
+      break;
+    }
+  }
+  if (ZeroIdx == -1u)
+    return;
+
+  unsigned Pow2Idx = -1;
+  for (const auto &[Idx, C] : enumerate(Clusters)) {
----------------
fhahn wrote:

I'm not sure how to best go about it. We need to find a power of 2 matching the destination of the 0.

I think we would have to either sort the cluster by constants so we are guaranteed to hit 0 first (but we probably need to preserve the current order to avoid changes in the emission order?) or collect a list of possible clusters with power-of-2 in the same loop that looks for zero, and then just check those. Would that be preferred?

https://github.com/llvm/llvm-project/pull/139736