[llvm] [SwitchLowering] Support merging 0 and power-of-2 case. (PR #139736)

[Florian Hahn via llvm-commits]

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@@ -362,6 +362,41 @@ void SwitchCG::SwitchLowering::findBitTestClusters(CaseClusterVector &Clusters,
     }
   }
   Clusters.resize(DstIndex);
+
+  // Check if the clusters contain one checking for 0 and another one checking
+  // for a power-of-2 constant with matching destinations. Those clusters can be
+  // combined to a single ane with CC_And.
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fhahn wrote:

Fixed, thanks

https://github.com/llvm/llvm-project/pull/139736