[llvm] [AMDGPU] Consider FLAT instructions for VMEM hazard detection (PR #137170)

[Matt Arsenault via llvm-commits]

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@@ -1417,9 +1417,8 @@ static bool shouldRunLdsBranchVmemWARHazardFixup(const MachineFunction &MF,
   bool HasVmem = false;
   for (auto &MBB : MF) {
     for (auto &MI : MBB) {
-      HasLds |= SIInstrInfo::isDS(MI);
-      HasVmem |= (SIInstrInfo::isVMEM(MI) && !SIInstrInfo::isFLAT(MI)) ||
-                 SIInstrInfo::isSegmentSpecificFLAT(MI);
+      HasLds |= SIInstrInfo::isDS(MI) || SIInstrInfo::isLDSDMA(MI);
+      HasVmem |= SIInstrInfo::isVMEM(MI) && !SIInstrInfo::isLDSDMA(MI);
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arsenm wrote:

Do actually flat FLAT instructions support the LDS bit? I thought the bit only applied to GLOBAL_* instructions (or in some ISAs the dedicated _LDS_ opcodes), but I can't seem to find this as a documented restriction.

I'd guess they don't really support LDS->LDS copy, so I would assume they implicitly assume a global memory source address if the bit isn't just ignored. In any case I don't think we ever codegen a FLAT_* instruction with the LDS bit.

I think the intent here was to check for  GLOBAL_* or SCRATCH_* instructions, excluding FLAT_* instructions (but all 3 sets are FLAT encoded instructions)



https://github.com/llvm/llvm-project/pull/137170