[llvm] 3e0e567 - [gn] port 6a477f6577a22 (aarch64 SDNodeInfo)

Nico Weber via llvm-commits llvm-commits at lists.llvm.org
Wed May 28 08:09:40 PDT 2025


Author: Nico Weber
Date: 2025-05-28T11:09:32-04:00
New Revision: 3e0e567ab9acae20b5411e18ff52ccac07cfb758

URL: https://github.com/llvm/llvm-project/commit/3e0e567ab9acae20b5411e18ff52ccac07cfb758
DIFF: https://github.com/llvm/llvm-project/commit/3e0e567ab9acae20b5411e18ff52ccac07cfb758.diff

LOG: [gn] port 6a477f6577a22 (aarch64 SDNodeInfo)

Added: 
    

Modified: 
    llvm/utils/gn/secondary/bolt/unittests/Core/BUILD.gn
    llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn

Removed: 
    


################################################################################
diff  --git a/llvm/utils/gn/secondary/bolt/unittests/Core/BUILD.gn b/llvm/utils/gn/secondary/bolt/unittests/Core/BUILD.gn
index 79f19a416c0e1..ae3d6b588b63b 100644
--- a/llvm/utils/gn/secondary/bolt/unittests/Core/BUILD.gn
+++ b/llvm/utils/gn/secondary/bolt/unittests/Core/BUILD.gn
@@ -35,6 +35,7 @@ unittest("CoreTests") {
     deps += [
       "//llvm/lib/Target/AArch64/MCTargetDesc",
       "//llvm/lib/Target/AArch64/Utils",
+      "//llvm/lib/Target/AArch64:AArch64GenSDNodeInfo",
     ]
   }
   if (llvm_build_X86) {

diff  --git a/llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn
index 6ef0bc7a7d67a..c684443df619c 100644
--- a/llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn
@@ -72,6 +72,15 @@ tablegen("AArch64GenRegisterBank") {
   td_file = "AArch64.td"
 }
 
+tablegen("AArch64GenSDNodeInfo") {
+  visibility = [
+    ":LLVMAArch64CodeGen",
+    "//bolt/unittests/Core:CoreTests",
+  ]
+  args = [ "-gen-sd-node-info" ]
+  td_file = "AArch64.td"
+}
+
 static_library("LLVMAArch64CodeGen") {
   deps = [
     ":AArch64GenCallingConv",
@@ -84,6 +93,7 @@ static_library("LLVMAArch64CodeGen") {
     ":AArch64GenPostLegalizeGILowering",
     ":AArch64GenPreLegalizeGICombiner",
     ":AArch64GenRegisterBank",
+    ":AArch64GenSDNodeInfo",
 
     # See https://reviews.llvm.org/D69130
     "AsmParser:AArch64GenAsmMatcher",


        


More information about the llvm-commits mailing list