[llvm] [Codegen] Remove redundant instruction using machinelateCleanup (PR #139716)

Rohit Aggarwal via llvm-commits llvm-commits at lists.llvm.org
Wed May 28 07:32:30 PDT 2025


rohitaggarwal007 wrote:

Before Register allocator these are the instructions:

  undef %9510.sub_32bit:**gr64_with_sub_8bit** = MOV32r0 implicit-def dead $eflags
  MOV64mr %stack.48, 1, $noreg, 0, $noreg, %9510:**gr64_with_sub_8bit** :: (store (s64) into %stack.48)


After register allocation rewriter:

renamable $eax = MOV32r0 implicit-def dead $eflags, implicit-def $rax
  MOV64mr %stack.48, 1, $noreg, 0, $noreg, killed renamable $rax :: (store (s64) into %stack.48)

Register allocation is allowing implicit def of Super register(64 bit) as MOV32r0 support 32 bit explicitly.

Then it mean that  internally MOV32r0 clears the top 32-bits remaining bits of $rax also.

Is my understanding correct?

https://github.com/llvm/llvm-project/pull/139716


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